| commit | b67bc7cb408816b94224a74dff9868d2a38bf30c | [log] [tgz] |
|---|---|---|
| author | Palmer Dabbelt <palmer@dabbelt.com> | Mon Jun 26 22:07:50 2017 -0700 |
| committer | Palmer Dabbelt <palmer@sifive.com> | Mon Aug 13 09:36:02 2018 -0700 |
| tree | b34c3971cbc2e70e716a6cbbea905da4142d8001 | |
| parent | 4c42ae4f6ab78f9ce3fa7e66de44f666733288da [diff] |
dt-bindings: interrupt-controller: RISC-V local interrupt controller Add documentation on the RISC-V local interrupt controller, which is a per-hart interrupt controller that manages all interrupts entering a RISC-V hart. This interrupt controller is present on all RISC-V systems. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com> [hch: minor cleanups] Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>