commit | 6376931babd833dbd6f51e22a3de449ce6c60d61 | [log] [tgz] |
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author | Moritz Fischer <moritz.fischer@ettus.com> | Mon Oct 19 13:35:33 2015 -0700 |
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | Fri Oct 23 16:49:12 2015 -0700 |
tree | 6d77e97b618dfccd144e84227fa84803ebd491b2 | |
parent | 525d12f27bb05c4255857849a8d28c0c086bd28e [diff] |
fpga: zynq-fpga: Fix unbalanced clock handling This commit fixes the unbalanced clock handling, where a failed probe would leave the clock with an enable count of -1. Reported-by: Josh Cartwright <joshc@ni.com> Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>