Merge tag 'intc-part2-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers
Merge "part 2 of omap intc changes" from Tony Lindgren:
Second part of omap intc interrupt controller changes to
move it to drivers.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* tag 'intc-part2-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
irqchip: omap-intc: remove unnecessary comments
irqchip: omap-intc: correct maximum number or MIR registers
irqchip: omap-intc: enable TURBO idle mode
irqchip: omap-intc: enable IP protection
irqchip: omap-intc: remove unnecesary of_address_to_resource() call
irqchip: omap-intc: comment style cleanup
irqchip: omap-intc: minor improvement to omap_irq_pending()
arm: omap: irq: move irq.c to drivers/irqchip/
irqchip: add irq-omap-intc.h header
arm: omap2: n8x0: move i2c devices to DT
diff --git a/arch/arm/boot/dts/omap2420-n810.dts b/arch/arm/boot/dts/omap2420-n810.dts
index 21baec1..b604d26 100644
--- a/arch/arm/boot/dts/omap2420-n810.dts
+++ b/arch/arm/boot/dts/omap2420-n810.dts
@@ -6,3 +6,10 @@
model = "Nokia N810";
compatible = "nokia,n810", "nokia,n8x0", "ti,omap2420", "ti,omap2";
};
+
+&i2c2 {
+ aic3x@18 {
+ compatible = "tlv320aic3x";
+ reg = <0x18>;
+ };
+};
diff --git a/arch/arm/boot/dts/omap2420-n8x0-common.dtsi b/arch/arm/boot/dts/omap2420-n8x0-common.dtsi
index 89608b2..24c50db 100644
--- a/arch/arm/boot/dts/omap2420-n8x0-common.dtsi
+++ b/arch/arm/boot/dts/omap2420-n8x0-common.dtsi
@@ -27,6 +27,12 @@
&i2c1 {
clock-frequency = <400000>;
+
+ pmic@72 {
+ compatible = "menelaus";
+ reg = <0x72>;
+ interrupts = <7 IRQ_TYPE_EDGE_RISING>;
+ };
};
&i2c2 {
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 11ccf0b..691d62a 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -86,6 +86,7 @@
select PINCTRL
select SOC_BUS
select TI_PRIV_EDMA
+ select OMAP_IRQCHIP
help
Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 69bbcba..0b6095c 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -10,7 +10,6 @@
common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
omap_device.o sram.o drm.o
-omap-2-3-common = irq.o
hwmod-common = omap_hwmod.o omap_hwmod_reset.o \
omap_hwmod_common_data.o
clock-common = clock.o clock_common_data.o \
@@ -20,7 +19,7 @@
obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common)
obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
obj-$(CONFIG_ARCH_OMAP4) += $(hwmod-common) $(secure-common)
-obj-$(CONFIG_SOC_AM33XX) += irq.o $(hwmod-common)
+obj-$(CONFIG_SOC_AM33XX) += $(hwmod-common)
obj-$(CONFIG_SOC_OMAP5) += $(hwmod-common) $(secure-common)
obj-$(CONFIG_SOC_AM43XX) += $(hwmod-common) $(secure-common)
obj-$(CONFIG_SOC_DRA7XX) += $(hwmod-common) $(secure-common)
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index aead77a..97767a2 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -33,6 +33,7 @@
#include "mmc.h"
#include "soc.h"
#include "gpmc-onenand.h"
+#include "common-board-devices.h"
#define TUSB6010_ASYNC_CS 1
#define TUSB6010_SYNC_CS 4
@@ -568,29 +569,14 @@
}
#endif
-static struct menelaus_platform_data n8x0_menelaus_platform_data __initdata = {
+struct menelaus_platform_data n8x0_menelaus_platform_data __initdata = {
.late_init = n8x0_menelaus_late_init,
};
-static struct i2c_board_info __initdata n8x0_i2c_board_info_1[] __initdata = {
- {
- I2C_BOARD_INFO("menelaus", 0x72),
- .irq = 7 + OMAP_INTC_START,
- .platform_data = &n8x0_menelaus_platform_data,
- },
-};
-
-static struct aic3x_pdata n810_aic33_data __initdata = {
+struct aic3x_pdata n810_aic33_data __initdata = {
.gpio_reset = 118,
};
-static struct i2c_board_info n810_i2c_board_info_2[] __initdata = {
- {
- I2C_BOARD_INFO("tlv320aic3x", 0x18),
- .platform_data = &n810_aic33_data,
- },
-};
-
static int __init n8x0_late_initcall(void)
{
if (!board_caps)
@@ -612,11 +598,5 @@
board_check_revision();
spi_register_board_info(n800_spi_board_info,
ARRAY_SIZE(n800_spi_board_info));
- i2c_register_board_info(0, n8x0_i2c_board_info_1,
- ARRAY_SIZE(n8x0_i2c_board_info_1));
- if (board_is_n810())
- i2c_register_board_info(1, n810_i2c_board_info_2,
- ARRAY_SIZE(n810_i2c_board_info_2));
-
return &mmc1_data;
}
diff --git a/arch/arm/mach-omap2/common-board-devices.h b/arch/arm/mach-omap2/common-board-devices.h
index f338177..07c88ae 100644
--- a/arch/arm/mach-omap2/common-board-devices.h
+++ b/arch/arm/mach-omap2/common-board-devices.h
@@ -1,6 +1,8 @@
#ifndef __OMAP_COMMON_BOARD_DEVICES__
#define __OMAP_COMMON_BOARD_DEVICES__
+#include <sound/tlv320aic3x.h>
+#include <linux/mfd/menelaus.h>
#include "twl-common.h"
#define NAND_BLOCK_SIZE SZ_128K
@@ -12,4 +14,7 @@
struct ads7846_platform_data *board_pdata);
void *n8x0_legacy_init(void);
+extern struct menelaus_platform_data n8x0_menelaus_platform_data;
+extern struct aic3x_pdata n810_aic33_data;
+
#endif /* __OMAP_COMMON_BOARD_DEVICES__ */
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 1800093..377eea8 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -32,6 +32,7 @@
#include <linux/i2c/twl.h>
#include <linux/i2c-omap.h>
#include <linux/reboot.h>
+#include <linux/irqchip/irq-omap-intc.h>
#include <asm/proc-fns.h>
@@ -210,15 +211,6 @@
extern struct device *omap2_get_l3_device(void);
extern struct device *omap4_get_dsp_device(void);
-void omap2_init_irq(void);
-void omap3_init_irq(void);
-void ti81xx_init_irq(void);
-extern int omap_irq_pending(void);
-void omap_intc_save_context(void);
-void omap_intc_restore_context(void);
-void omap3_intc_suspend(void);
-void omap3_intc_prepare_idle(void);
-void omap3_intc_resume_idle(void);
void omap_gic_of_init(void);
#ifdef CONFIG_CACHE_L2X0
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index 8695fd4..06a0ccf 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -336,6 +336,8 @@
struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
#ifdef CONFIG_MACH_NOKIA_N8X0
OF_DEV_AUXDATA("ti,omap2420-mmc", 0x4809c000, "mmci-omap.0", NULL),
+ OF_DEV_AUXDATA("menelaus", 0x72, "1-0072", &n8x0_menelaus_platform_data),
+ OF_DEV_AUXDATA("tlv320aic3x", 0x18, "2-0018", &n810_aic33_data),
#endif
#ifdef CONFIG_ARCH_OMAP3
OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002030, "48002030.pinmux", &pcs_pdata),
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index b8632bf..9d539de 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -75,6 +75,11 @@
bool
select IRQ_DOMAIN
+config OMAP_IRQCHIP
+ bool
+ select GENERIC_IRQ_CHIP
+ select IRQ_DOMAIN
+
config ORION_IRQCHIP
bool
select IRQ_DOMAIN
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 73052ba..d0a2613 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -13,6 +13,7 @@
obj-$(CONFIG_CLPS711X_IRQCHIP) += irq-clps711x.o
obj-$(CONFIG_OR1K_PIC) += irq-or1k-pic.o
obj-$(CONFIG_ORION_IRQCHIP) += irq-orion.o
+obj-$(CONFIG_OMAP_IRQCHIP) += irq-omap-intc.o
obj-$(CONFIG_ARCH_SUNXI) += irq-sun4i.o
obj-$(CONFIG_ARCH_SUNXI) += irq-sunxi-nmi.o
obj-$(CONFIG_ARCH_SPEAR3XX) += spear-shirq.o
diff --git a/arch/arm/mach-omap2/irq.c b/drivers/irqchip/irq-omap-intc.c
similarity index 89%
rename from arch/arm/mach-omap2/irq.c
rename to drivers/irqchip/irq-omap-intc.c
index b2993e4..f3814e7 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/drivers/irqchip/irq-omap-intc.c
@@ -17,15 +17,16 @@
#include <linux/io.h>
#include <asm/exception.h>
-#include <asm/mach/irq.h>
#include <linux/irqdomain.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
-#include "soc.h"
-#include "common.h"
-#include "../../drivers/irqchip/irqchip.h"
+#include "irqchip.h"
+
+/* Define these here for now until we drop all board-files */
+#define OMAP24XX_IC_BASE 0x480fe000
+#define OMAP34XX_IC_BASE 0x48200000
/* selected INTC register offsets */
@@ -48,16 +49,13 @@
#define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */
#define INTCPS_NR_ILR_REGS 128
-#define INTCPS_NR_MIR_REGS 3
+#define INTCPS_NR_MIR_REGS 4
-/*
- * OMAP2 has a number of different interrupt controllers, each interrupt
- * controller is identified as its own "bank". Register definitions are
- * fairly consistent for each bank, but not all registers are implemented
- * for each bank.. when in doubt, consult the TRM.
- */
+#define INTC_IDLE_FUNCIDLE (1 << 0)
+#define INTC_IDLE_TURBO (1 << 1)
-/* Structure to save interrupt controller context */
+#define INTC_PROTECTION_ENABLE (1 << 0)
+
struct omap_intc_regs {
u32 sysconfig;
u32 protection;
@@ -73,7 +71,6 @@
static int omap_nr_pending = 3;
static int omap_nr_irqs = 96;
-/* INTC bank register get/set */
static void intc_writel(u32 reg, u32 val)
{
writel_relaxed(val, omap_irq_base + reg);
@@ -131,12 +128,14 @@
* cf. errata ID i540 for 3430 (all revisions up to 3.1.x)
*/
intc_writel(INTC_SYSCONFIG, 0);
+ intc_writel(INTC_IDLE, INTC_IDLE_TURBO);
}
void omap3_intc_resume_idle(void)
{
/* Re-enable autoidle */
intc_writel(INTC_SYSCONFIG, 1);
+ intc_writel(INTC_IDLE, 0);
}
/* XXX: FIQ and additional INTC support (only MPU at the moment) */
@@ -173,11 +172,10 @@
int omap_irq_pending(void)
{
- int irq;
+ int i;
- for (irq = 0; irq < omap_nr_irqs; irq += 32)
- if (intc_readl(INTC_PENDING_IRQ0 +
- ((irq >> 5) << 5)))
+ for (i = 0; i < omap_nr_pending; i++)
+ if (intc_readl(INTC_PENDING_IRQ0 + (0x20 * i)))
return 1;
return 0;
}
@@ -290,12 +288,28 @@
return 0;
}
+static void __init omap_irq_enable_protection(void)
+{
+ u32 reg;
+
+ reg = intc_readl(INTC_PROTECTION);
+ reg |= INTC_PROTECTION_ENABLE;
+ intc_writel(INTC_PROTECTION, reg);
+}
+
static int __init omap_init_irq(u32 base, struct device_node *node)
{
+ int ret;
+
if (node)
- return omap_init_irq_of(node);
+ ret = omap_init_irq_of(node);
else
- return omap_init_irq_legacy(base);
+ ret = omap_init_irq_legacy(base);
+
+ if (ret == 0)
+ omap_irq_enable_protection();
+
+ return ret;
}
static asmlinkage void __exception_irq_entry
@@ -326,9 +340,11 @@
}
} while (irqnr);
- /* If an irq is masked or deasserted while active, we will
+ /*
+ * If an irq is masked or deasserted while active, we will
* keep ending up here with no irq handled. So remove it from
- * the INTC with an ack.*/
+ * the INTC with an ack.
+ */
if (!handled_irq)
omap_ack_irq(NULL);
}
@@ -360,7 +376,6 @@
static int __init intc_of_init(struct device_node *node,
struct device_node *parent)
{
- struct resource res;
int ret;
omap_nr_pending = 3;
@@ -369,11 +384,6 @@
if (WARN_ON(!node))
return -ENODEV;
- if (of_address_to_resource(node, 0, &res)) {
- WARN(1, "unable to get intc registers\n");
- return -EINVAL;
- }
-
if (of_device_is_compatible(node, "ti,am33xx-intc")) {
omap_nr_irqs = 128;
omap_nr_pending = 4;
diff --git a/include/linux/irqchip/irq-omap-intc.h b/include/linux/irqchip/irq-omap-intc.h
new file mode 100644
index 0000000..e06b370
--- /dev/null
+++ b/include/linux/irqchip/irq-omap-intc.h
@@ -0,0 +1,32 @@
+/**
+ * irq-omap-intc.h - INTC Idle Functions
+ *
+ * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Author: Felipe Balbi <balbi@ti.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_OMAP_INTC_H
+#define __INCLUDE_LINUX_IRQCHIP_IRQ_OMAP_INTC_H
+
+void omap2_init_irq(void);
+void omap3_init_irq(void);
+void ti81xx_init_irq(void);
+
+int omap_irq_pending(void);
+void omap_intc_save_context(void);
+void omap_intc_restore_context(void);
+void omap3_intc_suspend(void);
+void omap3_intc_prepare_idle(void);
+void omap3_intc_resume_idle(void);
+
+#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_OMAP_INTC_H */