tree 9e02c60d8ab02495c6d2875d9c90c71914f30f12
parent ece8e0b2f9c980e5511fe8db2d68c6f1859b9d83
author Stephane Eranian <eranian@google.com> 1361355312 +0100
committer Ingo Molnar <mingo@kernel.org> 1361355766 +0100

perf/x86: Add Intel IvyBridge event scheduling constraints

Intel IvyBridge processor has different constraints compared
to SandyBridge. Therefore it needs its own contraint table.
This patch adds the constraint table.

Without this patch, the events listed in the patch may not be
scheduled correctly and bogus counts may be collected.

Signed-off-by: Stephane Eranian <eranian@google.com>
Cc: peterz@infradead.org
Cc: ak@linux.intel.com
Cc: acme@redhat.com
Cc: jolsa@redhat.com
Cc: namhyung.kim@lge.com
Link: http://lkml.kernel.org/r/1361355312-3323-1-git-send-email-eranian@google.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>