tree 8295f6d10797212168f2a0c8810b0acf05243ee7
parent f8f5701bdaf9134b1f90e5044a82c66324d2073f
author Sascha Hauer <s.hauer@pengutronix.de> 1338805281 +0200
committer Sascha Hauer <s.hauer@pengutronix.de> 1338816221 +0200

ARM i.MX pllv2: use standard register set unconditionally

The i.MX5 PLL has two different register sets for setting the
rate. One is used for the standard case and and is used for
DVFS. Which one of them is used depends on a hardware input
of the PLL. Current implementation reads back from the hardware
which setting is used. This is bogus: If we ever want to implement
DVFS we have to program both register sets and not only the one
which happens to be used at the moment. For now, just use the
standard register set uncondionally.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>