| /* |
| * Exynos specific definitions for Samsung pinctrl and gpiolib driver. |
| * |
| * Copyright (c) 2012 Samsung Electronics Co., Ltd. |
| * http://www.samsung.com |
| * Copyright (c) 2012 Linaro Ltd |
| * http://www.linaro.org |
| * |
| * This file contains the Exynos specific definitions for the Samsung |
| * pinctrl/gpiolib interface drivers. |
| * |
| * Author: Thomas Abraham <thomas.ab@samsung.com> |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License as published by |
| * the Free Software Foundation; either version 2 of the License, or |
| * (at your option) any later version. |
| */ |
| |
| /* External GPIO and wakeup interrupt related definitions */ |
| #define EXYNOS_GPIO_ECON_OFFSET 0x700 |
| #define EXYNOS_GPIO_EMASK_OFFSET 0x900 |
| #define EXYNOS_GPIO_EPEND_OFFSET 0xA00 |
| #define EXYNOS_WKUP_ECON_OFFSET 0xE00 |
| #define EXYNOS_WKUP_EMASK_OFFSET 0xF00 |
| #define EXYNOS_WKUP_EPEND_OFFSET 0xF40 |
| #define EXYNOS_SVC_OFFSET 0xB08 |
| #define EXYNOS_EINT_FUNC 0xF |
| |
| /* helpers to access interrupt service register */ |
| #define EXYNOS_SVC_GROUP_SHIFT 3 |
| #define EXYNOS_SVC_GROUP_MASK 0x1f |
| #define EXYNOS_SVC_NUM_MASK 7 |
| #define EXYNOS_SVC_GROUP(x) ((x >> EXYNOS_SVC_GROUP_SHIFT) & \ |
| EXYNOS_SVC_GROUP_MASK) |
| |
| /* Exynos specific external interrupt trigger types */ |
| #define EXYNOS_EINT_LEVEL_LOW 0 |
| #define EXYNOS_EINT_LEVEL_HIGH 1 |
| #define EXYNOS_EINT_EDGE_FALLING 2 |
| #define EXYNOS_EINT_EDGE_RISING 3 |
| #define EXYNOS_EINT_EDGE_BOTH 4 |
| #define EXYNOS_EINT_CON_MASK 0xF |
| #define EXYNOS_EINT_CON_LEN 4 |
| |
| #define EXYNOS_EINT_MAX_PER_BANK 8 |
| #define EXYNOS_EINT_NR_WKUP_EINT |
| |
| #define EXYNOS_PIN_BANK_EINTN(pins, reg, id) \ |
| { \ |
| .pctl_offset = reg, \ |
| .nr_pins = pins, \ |
| .func_width = 4, \ |
| .pud_width = 2, \ |
| .drv_width = 2, \ |
| .conpdn_width = 2, \ |
| .pudpdn_width = 2, \ |
| .eint_type = EINT_TYPE_NONE, \ |
| .name = id \ |
| } |
| |
| #define EXYNOS_PIN_BANK_EINTG(pins, reg, id) \ |
| { \ |
| .pctl_offset = reg, \ |
| .nr_pins = pins, \ |
| .func_width = 4, \ |
| .pud_width = 2, \ |
| .drv_width = 2, \ |
| .conpdn_width = 2, \ |
| .pudpdn_width = 2, \ |
| .eint_type = EINT_TYPE_GPIO, \ |
| .name = id \ |
| } |
| |
| /** |
| * struct exynos_geint_data: gpio eint specific data for irq_chip callbacks. |
| * @bank: pin bank from which this gpio interrupt originates. |
| * @pin: pin number within the bank. |
| * @eint_offset: offset to be added to the con/pend/mask register bank base. |
| */ |
| struct exynos_geint_data { |
| struct samsung_pin_bank *bank; |
| u32 pin; |
| u32 eint_offset; |
| }; |
| |
| /** |
| * struct exynos_weint_data: irq specific data for all the wakeup interrupts |
| * generated by the external wakeup interrupt controller. |
| * @domain: irq domain representing the external wakeup interrupts |
| * @irq: interrupt number within the domain. |
| */ |
| struct exynos_weint_data { |
| struct irq_domain *domain; |
| u32 irq; |
| }; |