tree 2de369c6aa848dd57e77d138569dba7c978a0a37
parent 9d9a49ab32e8013e2a438a18f17641b4e36bfff2
author Gabor Juhos <juhosg@openwrt.org> 1377165434 +0200
committer Ralf Baechle <ralf@linux-mips.org> 1378243336 +0200

MIPS: ath79: Don't hardwire cpu_has_dsp{2} to 0

The ath79 code supports various SoCs which are using either a 24Kc
or a 74Kc core. The 74Kc core has DSP support, so don't hardwire
the values to zero.

Commit 00dc5ce2a653a332190aa29b2e1f3bceaa7d5b8d (MIPS: ath79: don't
hardcode the unavailability of the DSP ASE) has fixed this already,
but that change got reverted by 475032564ed96c94c085e3e7a90e07d150a7cec9
(MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required.)

Reported-by: Helmut Schaa <helmut.schaa@googlemail.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5750/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>