commit 71c76a086f04055e2da8d7d71c77e0b37ac310a2
author Christian König <christian.koenig@amd.com> Sat Sep 03 16:18:26 2016 +0200
committer Alex Deucher <alexander.deucher@amd.com> Wed Sep 14 15:10:30 2016 -0400
tree 298dd7e0dd6670446d429c55ea52dad654d49440
parent d28d6e6fa55e08a16a83ae572b1cbf4f03e8fbf1

drm/amdgpu: fix GTT offset handling

Otherwise we run into problems on 32bit systems with more than 4GB GART.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 3beb10b..a4914b7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -648,7 +648,7 @@
 			return r;
 		}
 	}
-	gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);
+	gtt->offset = (u64)bo_mem->start << PAGE_SHIFT;
 	if (!ttm->num_pages) {
 		WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n",
 		     ttm->num_pages, bo_mem, ttm);
@@ -663,8 +663,8 @@
 		ttm->pages, gtt->ttm.dma_address, flags);
 
 	if (r) {
-		DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
-			  ttm->num_pages, (unsigned)gtt->offset);
+		DRM_ERROR("failed to bind %lu pages at 0x%08llX\n",
+			  ttm->num_pages, gtt->offset);
 		return r;
 	}
 	spin_lock(&gtt->adev->gtt_list_lock);
@@ -689,8 +689,8 @@
 				     flags);
 		if (r) {
 			spin_unlock(&adev->gtt_list_lock);
-			DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
-				  gtt->ttm.ttm.num_pages, (unsigned)gtt->offset);
+			DRM_ERROR("failed to bind %lu pages at 0x%08llX\n",
+				  gtt->ttm.ttm.num_pages, gtt->offset);
 			return r;
 		}
 	}