ns9xxx: prepare for adding support for Digi ns921x processors

The hardware team changed some things that were taken as being common to
all ns9xxx processors up to now.

This patch addresses:

- irqs: s/IRQ_/IRQ_NS9360_/

- system module registers: some registers are still general, their
  definition lives now in include/asm-arm/arch-ns9xxx/regs-sys-common.h.
  The ns9360 specific ones are in .../regs-sys-ns9360.h
  As a result ns9360_systemclock cannot be static inline any more as its
  definition needs regs-sys-ns9360.h.  This becomes a real problem when
  adding support for ns9215 as this will need regs-sys-ns9215.h and
  including both files will not work.  For the same reason
  ns9360_reset() is now non-inline and gpio functions live in their own
  file.

- register mapping: s/ns9xxx_map_io/ns9360_map_io/

- timer registers:  move time.c to time-ns9360.c;
  s/ns9xxx_timer/ns9360_timer/

Signed-off-by: Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com>
diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
index 14a06da..a494b71c 100644
--- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c
+++ b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
@@ -14,7 +14,8 @@
 #include <asm/gpio.h>
 
 #include <asm/arch-ns9xxx/board.h>
-#include <asm/arch-ns9xxx/regs-sys.h>
+#include <asm/arch-ns9xxx/processor-ns9360.h>
+#include <asm/arch-ns9xxx/regs-sys-ns9360.h>
 #include <asm/arch-ns9xxx/regs-mem.h>
 #include <asm/arch-ns9xxx/regs-bbu.h>
 #include <asm/arch-ns9xxx/regs-board-a9m9750dev.h>
@@ -103,9 +104,9 @@
 	int i;
 
 	if (gpio_request(11, "board a9m9750dev extirq2") == 0)
-		ns9xxx_gpio_configure(11, 0, 1);
+		ns9360_gpio_configure(11, 0, 1);
 	else
-		printk(KERN_ERR "%s: cannot get gpio 11 for IRQ_EXT2\n",
+		printk(KERN_ERR "%s: cannot get gpio 11 for IRQ_NS9XXX_EXT2\n",
 				__func__);
 
 	for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) {
@@ -114,13 +115,13 @@
 		set_irq_flags(i, IRQF_VALID);
 	}
 
-	/* IRQ_EXT2: level sensitive + active low */
+	/* IRQ_NS9XXX_EXT2: level sensitive + active low */
 	eic = __raw_readl(SYS_EIC(2));
 	REGSET(eic, SYS_EIC, PLTY, AL);
 	REGSET(eic, SYS_EIC, LVEDG, LEVEL);
 	__raw_writel(eic, SYS_EIC(2));
 
-	set_irq_chained_handler(IRQ_EXT2,
+	set_irq_chained_handler(IRQ_NS9XXX_EXT2,
 			a9m9750dev_fpga_demux_handler);
 }