| commit | 73bbf6bd907906dcbdc78f3af38a722c0fe498d8 | [log] [tgz] |
|---|---|---|
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | Fri Nov 21 21:54:25 2014 +0200 |
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | Wed Dec 03 09:29:36 2014 +0100 |
| tree | e212bcbf12131ac43b021095701135ad0e2320ec | |
| parent | aaecdf611a05cac26a94713bad25297e60225c29 [diff] |
drm/i915: Fix gen4 GPU reset On pre-ctg the reset bit directly controls the reset signal. We must assert it for >=20usec and then deassert it. Bit 1 is a RO status bit which should also go down when the reset is no longer asserted. Tested-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>