tree d8fad6b56dcdcdfba522011bab2e114d221ba6a3
parent 3d18c17e4f1699c3a4f47d2483c5d4c3ab3a242b
author John Crispin <blogic@openwrt.org> 1358585664 +0000
committer John Crispin <blogic@openwrt.org> 1361056517 +0100

MIPS: lantiq: adds static clock for PP32

The Lantiq DSL SoCs have an internal networking processor. Add code to read
the static clock rate.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4815/