| commit | 774dfc9bb7f2ab1950a790a8f13eca3d5c580033 | [log] [tgz] |
|---|---|---|
| author | Hiroshi DOYU <hdoyu@nvidia.com> | Thu May 10 10:45:32 2012 +0300 |
| committer | Joerg Roedel <joerg.roedel@amd.com> | Fri May 11 11:42:05 2012 +0200 |
| tree | c93680af050fcef7f5aff981ecfd3cf60abaf570 | |
| parent | 7cffae421e3cd29410ef4d75f2244655fdde3b60 [diff] |
iommu/tegra: gart: Fix register offset correctly DT passes the exact GART register ranges without any overlapping with MC register ranges. GART register offset needs to be adjusted by one passed by DT correctly. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>