tree c9519f6cb366fe1c3a3545c55f89e664f88e6a54
parent 61af4d8dceeb179b62cb342f4008ce3774d3d1fd
author Chen-Yu Tsai <wens@csie.org> 1421768791 +0800
committer Maxime Ripard <maxime.ripard@free-electrons.com> 1421770478 +0100

clk: sunxi: Add driver for A80 MMC config clocks/resets

On the A80 SoC, the 4 mmc controllers each have a separate register
controlling their register access clocks and reset controls. These
registers in turn share a ahb clock gate and reset control.

This patch adds a platform device driver for these controls. It
requires both clocks and reset controls to be available, so using
CLK_OF_DECLARE might not be the best way.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>