[SCSI] qla2xxx: Refactor qla data structures
Following changes have been made to the qla2xxx FC driver in
preparation for the multi- queue and future SR IOV hardware.
1. scsi_qla_host structure has been changed to contain scsi host
specific data only.
2. A new structure, qla_hw_data is created to contain HBA specific
hardware data.
3. Request and response IO specific data strucures are created.
4. The global list of fcports for the hba is not maintained anymore,
instead a fcport list is construted on per scsi_qla_host.
Signed-of-by: Anirban Chakraborty <anirban.chakraborty@qlogic.com>
Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
diff --git a/drivers/scsi/qla2xxx/qla_sup.c b/drivers/scsi/qla2xxx/qla_sup.c
index e4af678..6d6c021 100644
--- a/drivers/scsi/qla2xxx/qla_sup.c
+++ b/drivers/scsi/qla2xxx/qla_sup.c
@@ -10,10 +10,6 @@
#include <linux/vmalloc.h>
#include <asm/uaccess.h>
-static uint16_t qla2x00_nvram_request(scsi_qla_host_t *, uint32_t);
-static void qla2x00_nv_deselect(scsi_qla_host_t *);
-static void qla2x00_nv_write(scsi_qla_host_t *, uint16_t);
-
/*
* NVRAM support routines
*/
@@ -23,7 +19,7 @@
* @ha: HA context
*/
static void
-qla2x00_lock_nvram_access(scsi_qla_host_t *ha)
+qla2x00_lock_nvram_access(struct qla_hw_data *ha)
{
uint16_t data;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
@@ -56,7 +52,7 @@
* @ha: HA context
*/
static void
-qla2x00_unlock_nvram_access(scsi_qla_host_t *ha)
+qla2x00_unlock_nvram_access(struct qla_hw_data *ha)
{
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
@@ -67,6 +63,84 @@
}
/**
+ * qla2x00_nv_write() - Prepare for NVRAM read/write operation.
+ * @ha: HA context
+ * @data: Serial interface selector
+ */
+static void
+qla2x00_nv_write(struct qla_hw_data *ha, uint16_t data)
+{
+ struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
+
+ WRT_REG_WORD(®->nvram, data | NVR_SELECT | NVR_WRT_ENABLE);
+ RD_REG_WORD(®->nvram); /* PCI Posting. */
+ NVRAM_DELAY();
+ WRT_REG_WORD(®->nvram, data | NVR_SELECT | NVR_CLOCK |
+ NVR_WRT_ENABLE);
+ RD_REG_WORD(®->nvram); /* PCI Posting. */
+ NVRAM_DELAY();
+ WRT_REG_WORD(®->nvram, data | NVR_SELECT | NVR_WRT_ENABLE);
+ RD_REG_WORD(®->nvram); /* PCI Posting. */
+ NVRAM_DELAY();
+}
+
+/**
+ * qla2x00_nvram_request() - Sends read command to NVRAM and gets data from
+ * NVRAM.
+ * @ha: HA context
+ * @nv_cmd: NVRAM command
+ *
+ * Bit definitions for NVRAM command:
+ *
+ * Bit 26 = start bit
+ * Bit 25, 24 = opcode
+ * Bit 23-16 = address
+ * Bit 15-0 = write data
+ *
+ * Returns the word read from nvram @addr.
+ */
+static uint16_t
+qla2x00_nvram_request(struct qla_hw_data *ha, uint32_t nv_cmd)
+{
+ uint8_t cnt;
+ struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
+ uint16_t data = 0;
+ uint16_t reg_data;
+
+ /* Send command to NVRAM. */
+ nv_cmd <<= 5;
+ for (cnt = 0; cnt < 11; cnt++) {
+ if (nv_cmd & BIT_31)
+ qla2x00_nv_write(ha, NVR_DATA_OUT);
+ else
+ qla2x00_nv_write(ha, 0);
+ nv_cmd <<= 1;
+ }
+
+ /* Read data from NVRAM. */
+ for (cnt = 0; cnt < 16; cnt++) {
+ WRT_REG_WORD(®->nvram, NVR_SELECT | NVR_CLOCK);
+ RD_REG_WORD(®->nvram); /* PCI Posting. */
+ NVRAM_DELAY();
+ data <<= 1;
+ reg_data = RD_REG_WORD(®->nvram);
+ if (reg_data & NVR_DATA_IN)
+ data |= BIT_0;
+ WRT_REG_WORD(®->nvram, NVR_SELECT);
+ RD_REG_WORD(®->nvram); /* PCI Posting. */
+ NVRAM_DELAY();
+ }
+
+ /* Deselect chip. */
+ WRT_REG_WORD(®->nvram, NVR_DESELECT);
+ RD_REG_WORD(®->nvram); /* PCI Posting. */
+ NVRAM_DELAY();
+
+ return data;
+}
+
+
+/**
* qla2x00_get_nvram_word() - Calculates word position in NVRAM and calls the
* request routine to get the word from NVRAM.
* @ha: HA context
@@ -75,7 +149,7 @@
* Returns the word read from nvram @addr.
*/
static uint16_t
-qla2x00_get_nvram_word(scsi_qla_host_t *ha, uint32_t addr)
+qla2x00_get_nvram_word(struct qla_hw_data *ha, uint32_t addr)
{
uint16_t data;
uint32_t nv_cmd;
@@ -88,13 +162,27 @@
}
/**
+ * qla2x00_nv_deselect() - Deselect NVRAM operations.
+ * @ha: HA context
+ */
+static void
+qla2x00_nv_deselect(struct qla_hw_data *ha)
+{
+ struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
+
+ WRT_REG_WORD(®->nvram, NVR_DESELECT);
+ RD_REG_WORD(®->nvram); /* PCI Posting. */
+ NVRAM_DELAY();
+}
+
+/**
* qla2x00_write_nvram_word() - Write NVRAM data.
* @ha: HA context
* @addr: Address in NVRAM to write
* @data: word to program
*/
static void
-qla2x00_write_nvram_word(scsi_qla_host_t *ha, uint32_t addr, uint16_t data)
+qla2x00_write_nvram_word(struct qla_hw_data *ha, uint32_t addr, uint16_t data)
{
int count;
uint16_t word;
@@ -132,7 +220,7 @@
do {
if (!--wait_cnt) {
DEBUG9_10(printk("%s(%ld): NVRAM didn't go ready...\n",
- __func__, ha->host_no));
+ __func__, vha->host_no));
break;
}
NVRAM_DELAY();
@@ -150,8 +238,8 @@
}
static int
-qla2x00_write_nvram_word_tmo(scsi_qla_host_t *ha, uint32_t addr, uint16_t data,
- uint32_t tmo)
+qla2x00_write_nvram_word_tmo(struct qla_hw_data *ha, uint32_t addr,
+ uint16_t data, uint32_t tmo)
{
int ret, count;
uint16_t word;
@@ -209,102 +297,11 @@
}
/**
- * qla2x00_nvram_request() - Sends read command to NVRAM and gets data from
- * NVRAM.
- * @ha: HA context
- * @nv_cmd: NVRAM command
- *
- * Bit definitions for NVRAM command:
- *
- * Bit 26 = start bit
- * Bit 25, 24 = opcode
- * Bit 23-16 = address
- * Bit 15-0 = write data
- *
- * Returns the word read from nvram @addr.
- */
-static uint16_t
-qla2x00_nvram_request(scsi_qla_host_t *ha, uint32_t nv_cmd)
-{
- uint8_t cnt;
- struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
- uint16_t data = 0;
- uint16_t reg_data;
-
- /* Send command to NVRAM. */
- nv_cmd <<= 5;
- for (cnt = 0; cnt < 11; cnt++) {
- if (nv_cmd & BIT_31)
- qla2x00_nv_write(ha, NVR_DATA_OUT);
- else
- qla2x00_nv_write(ha, 0);
- nv_cmd <<= 1;
- }
-
- /* Read data from NVRAM. */
- for (cnt = 0; cnt < 16; cnt++) {
- WRT_REG_WORD(®->nvram, NVR_SELECT | NVR_CLOCK);
- RD_REG_WORD(®->nvram); /* PCI Posting. */
- NVRAM_DELAY();
- data <<= 1;
- reg_data = RD_REG_WORD(®->nvram);
- if (reg_data & NVR_DATA_IN)
- data |= BIT_0;
- WRT_REG_WORD(®->nvram, NVR_SELECT);
- RD_REG_WORD(®->nvram); /* PCI Posting. */
- NVRAM_DELAY();
- }
-
- /* Deselect chip. */
- WRT_REG_WORD(®->nvram, NVR_DESELECT);
- RD_REG_WORD(®->nvram); /* PCI Posting. */
- NVRAM_DELAY();
-
- return (data);
-}
-
-/**
- * qla2x00_nv_write() - Clean NVRAM operations.
- * @ha: HA context
- */
-static void
-qla2x00_nv_deselect(scsi_qla_host_t *ha)
-{
- struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
-
- WRT_REG_WORD(®->nvram, NVR_DESELECT);
- RD_REG_WORD(®->nvram); /* PCI Posting. */
- NVRAM_DELAY();
-}
-
-/**
- * qla2x00_nv_write() - Prepare for NVRAM read/write operation.
- * @ha: HA context
- * @data: Serial interface selector
- */
-static void
-qla2x00_nv_write(scsi_qla_host_t *ha, uint16_t data)
-{
- struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
-
- WRT_REG_WORD(®->nvram, data | NVR_SELECT | NVR_WRT_ENABLE);
- RD_REG_WORD(®->nvram); /* PCI Posting. */
- NVRAM_DELAY();
- WRT_REG_WORD(®->nvram, data | NVR_SELECT| NVR_CLOCK |
- NVR_WRT_ENABLE);
- RD_REG_WORD(®->nvram); /* PCI Posting. */
- NVRAM_DELAY();
- WRT_REG_WORD(®->nvram, data | NVR_SELECT | NVR_WRT_ENABLE);
- RD_REG_WORD(®->nvram); /* PCI Posting. */
- NVRAM_DELAY();
-}
-
-/**
* qla2x00_clear_nvram_protection() -
* @ha: HA context
*/
static int
-qla2x00_clear_nvram_protection(scsi_qla_host_t *ha)
+qla2x00_clear_nvram_protection(struct qla_hw_data *ha)
{
int ret, stat;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
@@ -352,9 +349,8 @@
wait_cnt = NVR_WAIT_CNT;
do {
if (!--wait_cnt) {
- DEBUG9_10(printk("%s(%ld): NVRAM didn't go "
- "ready...\n", __func__,
- ha->host_no));
+ DEBUG9_10(qla_printk(
+ "NVRAM didn't go ready...\n"));
break;
}
NVRAM_DELAY();
@@ -370,7 +366,7 @@
}
static void
-qla2x00_set_nvram_protection(scsi_qla_host_t *ha, int stat)
+qla2x00_set_nvram_protection(struct qla_hw_data *ha, int stat)
{
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
uint32_t word, wait_cnt;
@@ -412,8 +408,7 @@
wait_cnt = NVR_WAIT_CNT;
do {
if (!--wait_cnt) {
- DEBUG9_10(printk("%s(%ld): NVRAM didn't go ready...\n",
- __func__, ha->host_no));
+ DEBUG9_10(qla_printk("NVRAM didn't go ready...\n"));
break;
}
NVRAM_DELAY();
@@ -454,7 +449,7 @@
}
static uint32_t
-qla24xx_read_flash_dword(scsi_qla_host_t *ha, uint32_t addr)
+qla24xx_read_flash_dword(struct qla_hw_data *ha, uint32_t addr)
{
int rval;
uint32_t cnt, data;
@@ -482,21 +477,20 @@
}
uint32_t *
-qla24xx_read_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr,
+qla24xx_read_flash_data(scsi_qla_host_t *vha, uint32_t *dwptr, uint32_t faddr,
uint32_t dwords)
{
uint32_t i;
-
/* Dword reads to flash. */
for (i = 0; i < dwords; i++, faddr++)
- dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(ha,
+ dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(vha->hw,
flash_data_to_access_addr(faddr)));
return dwptr;
}
static int
-qla24xx_write_flash_dword(scsi_qla_host_t *ha, uint32_t addr, uint32_t data)
+qla24xx_write_flash_dword(struct qla_hw_data *ha, uint32_t addr, uint32_t data)
{
int rval;
uint32_t cnt;
@@ -519,7 +513,7 @@
}
static void
-qla24xx_get_flash_manufacturer(scsi_qla_host_t *ha, uint8_t *man_id,
+qla24xx_get_flash_manufacturer(struct qla_hw_data *ha, uint8_t *man_id,
uint8_t *flash_id)
{
uint32_t ids;
@@ -544,7 +538,7 @@
}
static int
-qla2xxx_find_flt_start(scsi_qla_host_t *ha, uint32_t *start)
+qla2xxx_find_flt_start(scsi_qla_host_t *vha, uint32_t *start)
{
const char *loc, *locations[] = { "DEF", "PCI" };
uint32_t pcihdr, pcids;
@@ -552,6 +546,8 @@
uint8_t *buf, *bcode, last_image;
uint16_t cnt, chksum, *wptr;
struct qla_flt_location *fltl;
+ struct qla_hw_data *ha = vha->hw;
+ struct req_que *req = ha->req;
/*
* FLT-location structure resides after the last PCI region.
@@ -563,20 +559,20 @@
FA_FLASH_LAYOUT_ADDR;
/* Begin with first PCI expansion ROM header. */
- buf = (uint8_t *)ha->request_ring;
- dcode = (uint32_t *)ha->request_ring;
+ buf = (uint8_t *)req->ring;
+ dcode = (uint32_t *)req->ring;
pcihdr = 0;
last_image = 1;
do {
/* Verify PCI expansion ROM header. */
- qla24xx_read_flash_data(ha, dcode, pcihdr >> 2, 0x20);
+ qla24xx_read_flash_data(vha, dcode, pcihdr >> 2, 0x20);
bcode = buf + (pcihdr % 4);
if (bcode[0x0] != 0x55 || bcode[0x1] != 0xaa)
goto end;
/* Locate PCI data structure. */
pcids = pcihdr + ((bcode[0x19] << 8) | bcode[0x18]);
- qla24xx_read_flash_data(ha, dcode, pcids >> 2, 0x20);
+ qla24xx_read_flash_data(vha, dcode, pcids >> 2, 0x20);
bcode = buf + (pcihdr % 4);
/* Validate signature of PCI data structure. */
@@ -591,14 +587,14 @@
} while (!last_image);
/* Now verify FLT-location structure. */
- fltl = (struct qla_flt_location *)ha->request_ring;
- qla24xx_read_flash_data(ha, dcode, pcihdr >> 2,
+ fltl = (struct qla_flt_location *)req->ring;
+ qla24xx_read_flash_data(vha, dcode, pcihdr >> 2,
sizeof(struct qla_flt_location) >> 2);
if (fltl->sig[0] != 'Q' || fltl->sig[1] != 'F' ||
fltl->sig[2] != 'L' || fltl->sig[3] != 'T')
goto end;
- wptr = (uint16_t *)ha->request_ring;
+ wptr = (uint16_t *)req->ring;
cnt = sizeof(struct qla_flt_location) >> 1;
for (chksum = 0; cnt; cnt--)
chksum += le16_to_cpu(*wptr++);
@@ -619,7 +615,7 @@
}
static void
-qla2xxx_get_flt_info(scsi_qla_host_t *ha, uint32_t flt_addr)
+qla2xxx_get_flt_info(scsi_qla_host_t *vha, uint32_t flt_addr)
{
const char *loc, *locations[] = { "DEF", "FLT" };
uint16_t *wptr;
@@ -627,12 +623,14 @@
uint32_t start;
struct qla_flt_header *flt;
struct qla_flt_region *region;
+ struct qla_hw_data *ha = vha->hw;
+ struct req_que *req = ha->req;
ha->flt_region_flt = flt_addr;
- wptr = (uint16_t *)ha->request_ring;
- flt = (struct qla_flt_header *)ha->request_ring;
+ wptr = (uint16_t *)req->ring;
+ flt = (struct qla_flt_header *)req->ring;
region = (struct qla_flt_region *)&flt[1];
- ha->isp_ops->read_optrom(ha, (uint8_t *)ha->request_ring,
+ ha->isp_ops->read_optrom(vha, (uint8_t *)req->ring,
flt_addr << 2, OPTROM_BURST_SIZE);
if (*wptr == __constant_cpu_to_le16(0xffff))
goto no_flash_data;
@@ -720,7 +718,7 @@
}
static void
-qla2xxx_get_fdt_info(scsi_qla_host_t *ha)
+qla2xxx_get_fdt_info(scsi_qla_host_t *vha)
{
#define FLASH_BLK_SIZE_4K 0x1000
#define FLASH_BLK_SIZE_32K 0x8000
@@ -731,10 +729,12 @@
struct qla_fdt_layout *fdt;
uint8_t man_id, flash_id;
uint16_t mid, fid;
+ struct qla_hw_data *ha = vha->hw;
+ struct req_que *req = ha->req;
- wptr = (uint16_t *)ha->request_ring;
- fdt = (struct qla_fdt_layout *)ha->request_ring;
- ha->isp_ops->read_optrom(ha, (uint8_t *)ha->request_ring,
+ wptr = (uint16_t *)req->ring;
+ fdt = (struct qla_fdt_layout *)req->ring;
+ ha->isp_ops->read_optrom(vha, (uint8_t *)req->ring,
ha->flt_region_fdt << 2, OPTROM_BURST_SIZE);
if (*wptr == __constant_cpu_to_le16(0xffff))
goto no_flash_data;
@@ -807,26 +807,27 @@
}
int
-qla2xxx_get_flash_info(scsi_qla_host_t *ha)
+qla2xxx_get_flash_info(scsi_qla_host_t *vha)
{
int ret;
uint32_t flt_addr;
+ struct qla_hw_data *ha = vha->hw;
if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha))
return QLA_SUCCESS;
- ret = qla2xxx_find_flt_start(ha, &flt_addr);
+ ret = qla2xxx_find_flt_start(vha, &flt_addr);
if (ret != QLA_SUCCESS)
return ret;
- qla2xxx_get_flt_info(ha, flt_addr);
- qla2xxx_get_fdt_info(ha);
+ qla2xxx_get_flt_info(vha, flt_addr);
+ qla2xxx_get_fdt_info(vha);
return QLA_SUCCESS;
}
void
-qla2xxx_flash_npiv_conf(scsi_qla_host_t *ha)
+qla2xxx_flash_npiv_conf(scsi_qla_host_t *vha)
{
#define NPIV_CONFIG_SIZE (16*1024)
void *data;
@@ -834,11 +835,12 @@
uint16_t cnt, chksum;
struct qla_npiv_header hdr;
struct qla_npiv_entry *entry;
+ struct qla_hw_data *ha = vha->hw;
if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha))
return;
- ha->isp_ops->read_optrom(ha, (uint8_t *)&hdr,
+ ha->isp_ops->read_optrom(vha, (uint8_t *)&hdr,
ha->flt_region_npiv_conf << 2, sizeof(struct qla_npiv_header));
if (hdr.version == __constant_cpu_to_le16(0xffff))
return;
@@ -857,7 +859,7 @@
return;
}
- ha->isp_ops->read_optrom(ha, (uint8_t *)data,
+ ha->isp_ops->read_optrom(vha, (uint8_t *)data,
ha->flt_region_npiv_conf << 2, NPIV_CONFIG_SIZE);
cnt = (sizeof(struct qla_npiv_header) + le16_to_cpu(hdr.entries) *
@@ -893,24 +895,22 @@
vid.node_name = wwn_to_u64(entry->node_name);
DEBUG2(qla_printk(KERN_DEBUG, ha, "NPIV[%02x]: wwpn=%llx "
- "wwnn=%llx vf_id=0x%x qos=0x%x.\n", cnt,
- (unsigned long long)vid.port_name,
- (unsigned long long)vid.node_name,
- le16_to_cpu(entry->vf_id), le16_to_cpu(entry->qos)));
+ "wwnn=%llx vf_id=0x%x qos=0x%x.\n", cnt, vid.port_name,
+ vid.node_name, le16_to_cpu(entry->vf_id),
+ le16_to_cpu(entry->qos)));
- vport = fc_vport_create(ha->host, 0, &vid);
+ vport = fc_vport_create(vha->host, 0, &vid);
if (!vport)
qla_printk(KERN_INFO, ha, "NPIV-Config: Failed to "
"create vport [%02x]: wwpn=%llx wwnn=%llx.\n", cnt,
- (unsigned long long)vid.port_name,
- (unsigned long long)vid.node_name);
+ vid.port_name, vid.node_name);
}
done:
kfree(data);
}
static void
-qla24xx_unprotect_flash(scsi_qla_host_t *ha)
+qla24xx_unprotect_flash(struct qla_hw_data *ha)
{
struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
@@ -929,7 +929,7 @@
}
static void
-qla24xx_protect_flash(scsi_qla_host_t *ha)
+qla24xx_protect_flash(struct qla_hw_data *ha)
{
uint32_t cnt;
struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
@@ -955,7 +955,7 @@
}
static int
-qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr,
+qla24xx_write_flash_data(scsi_qla_host_t *vha, uint32_t *dwptr, uint32_t faddr,
uint32_t dwords)
{
int ret;
@@ -965,6 +965,7 @@
dma_addr_t optrom_dma;
void *optrom = NULL;
uint32_t *s, *d;
+ struct qla_hw_data *ha = vha->hw;
ret = QLA_SUCCESS;
@@ -1002,9 +1003,8 @@
(fdata & 0xff00) |((fdata << 16) &
0xff0000) | ((fdata >> 16) & 0xff));
if (ret != QLA_SUCCESS) {
- DEBUG9(printk("%s(%ld) Unable to flash "
- "sector: address=%x.\n", __func__,
- ha->host_no, faddr));
+ DEBUG9(qla_printk("Unable to flash sector: "
+ "address=%x.\n", faddr));
break;
}
}
@@ -1016,7 +1016,7 @@
miter < OPTROM_BURST_DWORDS; miter++, s++, d++)
*s = cpu_to_le32(*d);
- ret = qla2x00_load_ram(ha, optrom_dma,
+ ret = qla2x00_load_ram(vha, optrom_dma,
flash_data_to_access_addr(faddr),
OPTROM_BURST_DWORDS);
if (ret != QLA_SUCCESS) {
@@ -1044,7 +1044,7 @@
if (ret != QLA_SUCCESS) {
DEBUG9(printk("%s(%ld) Unable to program flash "
"address=%x data=%x.\n", __func__,
- ha->host_no, faddr, *dwptr));
+ vha->host_no, faddr, *dwptr));
break;
}
@@ -1067,11 +1067,12 @@
}
uint8_t *
-qla2x00_read_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr,
+qla2x00_read_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr,
uint32_t bytes)
{
uint32_t i;
uint16_t *wptr;
+ struct qla_hw_data *ha = vha->hw;
/* Word reads to NVRAM via registers. */
wptr = (uint16_t *)buf;
@@ -1085,7 +1086,7 @@
}
uint8_t *
-qla24xx_read_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr,
+qla24xx_read_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr,
uint32_t bytes)
{
uint32_t i;
@@ -1094,20 +1095,21 @@
/* Dword reads to flash. */
dwptr = (uint32_t *)buf;
for (i = 0; i < bytes >> 2; i++, naddr++)
- dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(ha,
+ dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(vha->hw,
nvram_data_to_access_addr(naddr)));
return buf;
}
int
-qla2x00_write_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr,
+qla2x00_write_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr,
uint32_t bytes)
{
int ret, stat;
uint32_t i;
uint16_t *wptr;
unsigned long flags;
+ struct qla_hw_data *ha = vha->hw;
ret = QLA_SUCCESS;
@@ -1134,12 +1136,13 @@
}
int
-qla24xx_write_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr,
+qla24xx_write_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr,
uint32_t bytes)
{
int ret;
uint32_t i;
uint32_t *dwptr;
+ struct qla_hw_data *ha = vha->hw;
struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
ret = QLA_SUCCESS;
@@ -1162,9 +1165,8 @@
nvram_data_to_access_addr(naddr),
cpu_to_le32(*dwptr));
if (ret != QLA_SUCCESS) {
- DEBUG9(printk("%s(%ld) Unable to program "
- "nvram address=%x data=%x.\n", __func__,
- ha->host_no, naddr, *dwptr));
+ DEBUG9(qla_printk("Unable to program nvram address=%x "
+ "data=%x.\n", naddr, *dwptr));
break;
}
}
@@ -1182,11 +1184,12 @@
}
uint8_t *
-qla25xx_read_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr,
+qla25xx_read_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr,
uint32_t bytes)
{
uint32_t i;
uint32_t *dwptr;
+ struct qla_hw_data *ha = vha->hw;
/* Dword reads to flash. */
dwptr = (uint32_t *)buf;
@@ -1199,19 +1202,20 @@
}
int
-qla25xx_write_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr,
+qla25xx_write_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr,
uint32_t bytes)
{
+ struct qla_hw_data *ha = vha->hw;
#define RMW_BUFFER_SIZE (64 * 1024)
uint8_t *dbuf;
dbuf = vmalloc(RMW_BUFFER_SIZE);
if (!dbuf)
return QLA_MEMORY_ALLOC_FAILED;
- ha->isp_ops->read_optrom(ha, dbuf, ha->flt_region_vpd_nvram << 2,
+ ha->isp_ops->read_optrom(vha, dbuf, ha->flt_region_vpd_nvram << 2,
RMW_BUFFER_SIZE);
memcpy(dbuf + (naddr << 2), buf, bytes);
- ha->isp_ops->write_optrom(ha, dbuf, ha->flt_region_vpd_nvram << 2,
+ ha->isp_ops->write_optrom(vha, dbuf, ha->flt_region_vpd_nvram << 2,
RMW_BUFFER_SIZE);
vfree(dbuf);
@@ -1219,7 +1223,7 @@
}
static inline void
-qla2x00_flip_colors(scsi_qla_host_t *ha, uint16_t *pflags)
+qla2x00_flip_colors(struct qla_hw_data *ha, uint16_t *pflags)
{
if (IS_QLA2322(ha)) {
/* Flip all colors. */
@@ -1249,12 +1253,13 @@
#define PIO_REG(h, r) ((h)->pio_address + offsetof(struct device_reg_2xxx, r))
void
-qla2x00_beacon_blink(struct scsi_qla_host *ha)
+qla2x00_beacon_blink(struct scsi_qla_host *vha)
{
uint16_t gpio_enable;
uint16_t gpio_data;
uint16_t led_color = 0;
unsigned long flags;
+ struct qla_hw_data *ha = vha->hw;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
spin_lock_irqsave(&ha->hardware_lock, flags);
@@ -1298,17 +1303,18 @@
}
int
-qla2x00_beacon_on(struct scsi_qla_host *ha)
+qla2x00_beacon_on(struct scsi_qla_host *vha)
{
uint16_t gpio_enable;
uint16_t gpio_data;
unsigned long flags;
+ struct qla_hw_data *ha = vha->hw;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
ha->fw_options[1] |= FO1_DISABLE_GPIO6_7;
- if (qla2x00_set_fw_options(ha, ha->fw_options) != QLA_SUCCESS) {
+ if (qla2x00_set_fw_options(vha, ha->fw_options) != QLA_SUCCESS) {
qla_printk(KERN_WARNING, ha,
"Unable to update fw options (beacon on).\n");
return QLA_FUNCTION_FAILED;
@@ -1354,9 +1360,10 @@
}
int
-qla2x00_beacon_off(struct scsi_qla_host *ha)
+qla2x00_beacon_off(struct scsi_qla_host *vha)
{
int rval = QLA_SUCCESS;
+ struct qla_hw_data *ha = vha->hw;
ha->beacon_blink_led = 0;
@@ -1366,12 +1373,12 @@
else
ha->beacon_color_state = QLA_LED_GRN_ON;
- ha->isp_ops->beacon_blink(ha); /* This turns green LED off */
+ ha->isp_ops->beacon_blink(vha); /* This turns green LED off */
ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
ha->fw_options[1] &= ~FO1_DISABLE_GPIO6_7;
- rval = qla2x00_set_fw_options(ha, ha->fw_options);
+ rval = qla2x00_set_fw_options(vha, ha->fw_options);
if (rval != QLA_SUCCESS)
qla_printk(KERN_WARNING, ha,
"Unable to update fw options (beacon off).\n");
@@ -1380,7 +1387,7 @@
static inline void
-qla24xx_flip_colors(scsi_qla_host_t *ha, uint16_t *pflags)
+qla24xx_flip_colors(struct qla_hw_data *ha, uint16_t *pflags)
{
/* Flip all colors. */
if (ha->beacon_color_state == QLA_LED_ALL_ON) {
@@ -1395,11 +1402,12 @@
}
void
-qla24xx_beacon_blink(struct scsi_qla_host *ha)
+qla24xx_beacon_blink(struct scsi_qla_host *vha)
{
uint16_t led_color = 0;
uint32_t gpio_data;
unsigned long flags;
+ struct qla_hw_data *ha = vha->hw;
struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
/* Save the Original GPIOD. */
@@ -1428,20 +1436,21 @@
}
int
-qla24xx_beacon_on(struct scsi_qla_host *ha)
+qla24xx_beacon_on(struct scsi_qla_host *vha)
{
uint32_t gpio_data;
unsigned long flags;
+ struct qla_hw_data *ha = vha->hw;
struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
if (ha->beacon_blink_led == 0) {
/* Enable firmware for update */
ha->fw_options[1] |= ADD_FO1_DISABLE_GPIO_LED_CTRL;
- if (qla2x00_set_fw_options(ha, ha->fw_options) != QLA_SUCCESS)
+ if (qla2x00_set_fw_options(vha, ha->fw_options) != QLA_SUCCESS)
return QLA_FUNCTION_FAILED;
- if (qla2x00_get_fw_options(ha, ha->fw_options) !=
+ if (qla2x00_get_fw_options(vha, ha->fw_options) !=
QLA_SUCCESS) {
qla_printk(KERN_WARNING, ha,
"Unable to update fw options (beacon on).\n");
@@ -1469,16 +1478,17 @@
}
int
-qla24xx_beacon_off(struct scsi_qla_host *ha)
+qla24xx_beacon_off(struct scsi_qla_host *vha)
{
uint32_t gpio_data;
unsigned long flags;
+ struct qla_hw_data *ha = vha->hw;
struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
ha->beacon_blink_led = 0;
ha->beacon_color_state = QLA_LED_ALL_ON;
- ha->isp_ops->beacon_blink(ha); /* Will flip to all off. */
+ ha->isp_ops->beacon_blink(vha); /* Will flip to all off. */
/* Give control back to firmware. */
spin_lock_irqsave(&ha->hardware_lock, flags);
@@ -1492,13 +1502,13 @@
ha->fw_options[1] &= ~ADD_FO1_DISABLE_GPIO_LED_CTRL;
- if (qla2x00_set_fw_options(ha, ha->fw_options) != QLA_SUCCESS) {
+ if (qla2x00_set_fw_options(vha, ha->fw_options) != QLA_SUCCESS) {
qla_printk(KERN_WARNING, ha,
"Unable to update fw options (beacon off).\n");
return QLA_FUNCTION_FAILED;
}
- if (qla2x00_get_fw_options(ha, ha->fw_options) != QLA_SUCCESS) {
+ if (qla2x00_get_fw_options(vha, ha->fw_options) != QLA_SUCCESS) {
qla_printk(KERN_WARNING, ha,
"Unable to get fw options (beacon off).\n");
return QLA_FUNCTION_FAILED;
@@ -1517,7 +1527,7 @@
* @ha: HA context
*/
static void
-qla2x00_flash_enable(scsi_qla_host_t *ha)
+qla2x00_flash_enable(struct qla_hw_data *ha)
{
uint16_t data;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
@@ -1533,7 +1543,7 @@
* @ha: HA context
*/
static void
-qla2x00_flash_disable(scsi_qla_host_t *ha)
+qla2x00_flash_disable(struct qla_hw_data *ha)
{
uint16_t data;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
@@ -1554,7 +1564,7 @@
* Returns the byte read from flash @addr.
*/
static uint8_t
-qla2x00_read_flash_byte(scsi_qla_host_t *ha, uint32_t addr)
+qla2x00_read_flash_byte(struct qla_hw_data *ha, uint32_t addr)
{
uint16_t data;
uint16_t bank_select;
@@ -1615,7 +1625,7 @@
* @data: Data to write
*/
static void
-qla2x00_write_flash_byte(scsi_qla_host_t *ha, uint32_t addr, uint8_t data)
+qla2x00_write_flash_byte(struct qla_hw_data *ha, uint32_t addr, uint8_t data)
{
uint16_t bank_select;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
@@ -1678,7 +1688,7 @@
* Returns 0 on success, else non-zero.
*/
static int
-qla2x00_poll_flash(scsi_qla_host_t *ha, uint32_t addr, uint8_t poll_data,
+qla2x00_poll_flash(struct qla_hw_data *ha, uint32_t addr, uint8_t poll_data,
uint8_t man_id, uint8_t flash_id)
{
int status;
@@ -1718,8 +1728,8 @@
* Returns 0 on success, else non-zero.
*/
static int
-qla2x00_program_flash_address(scsi_qla_host_t *ha, uint32_t addr, uint8_t data,
- uint8_t man_id, uint8_t flash_id)
+qla2x00_program_flash_address(struct qla_hw_data *ha, uint32_t addr,
+ uint8_t data, uint8_t man_id, uint8_t flash_id)
{
/* Write Program Command Sequence. */
if (IS_OEM_001(ha)) {
@@ -1755,7 +1765,7 @@
* Returns 0 on success, else non-zero.
*/
static int
-qla2x00_erase_flash(scsi_qla_host_t *ha, uint8_t man_id, uint8_t flash_id)
+qla2x00_erase_flash(struct qla_hw_data *ha, uint8_t man_id, uint8_t flash_id)
{
/* Individual Sector Erase Command Sequence */
if (IS_OEM_001(ha)) {
@@ -1791,7 +1801,7 @@
* Returns 0 on success, else non-zero.
*/
static int
-qla2x00_erase_flash_sector(scsi_qla_host_t *ha, uint32_t addr,
+qla2x00_erase_flash_sector(struct qla_hw_data *ha, uint32_t addr,
uint32_t sec_mask, uint8_t man_id, uint8_t flash_id)
{
/* Individual Sector Erase Command Sequence */
@@ -1817,7 +1827,7 @@
* @flash_id: Flash ID
*/
static void
-qla2x00_get_flash_manufacturer(scsi_qla_host_t *ha, uint8_t *man_id,
+qla2x00_get_flash_manufacturer(struct qla_hw_data *ha, uint8_t *man_id,
uint8_t *flash_id)
{
qla2x00_write_flash_byte(ha, 0x5555, 0xaa);
@@ -1831,8 +1841,8 @@
}
static void
-qla2x00_read_flash_data(scsi_qla_host_t *ha, uint8_t *tmp_buf, uint32_t saddr,
- uint32_t length)
+qla2x00_read_flash_data(struct qla_hw_data *ha, uint8_t *tmp_buf,
+ uint32_t saddr, uint32_t length)
{
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
uint32_t midpoint, ilength;
@@ -1856,14 +1866,15 @@
}
static inline void
-qla2x00_suspend_hba(struct scsi_qla_host *ha)
+qla2x00_suspend_hba(struct scsi_qla_host *vha)
{
int cnt;
unsigned long flags;
+ struct qla_hw_data *ha = vha->hw;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
/* Suspend HBA. */
- scsi_block_requests(ha->host);
+ scsi_block_requests(vha->host);
ha->isp_ops->disable_intrs(ha);
set_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags);
@@ -1884,26 +1895,29 @@
}
static inline void
-qla2x00_resume_hba(struct scsi_qla_host *ha)
+qla2x00_resume_hba(struct scsi_qla_host *vha)
{
+ struct qla_hw_data *ha = vha->hw;
+
/* Resume HBA. */
clear_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags);
- set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
- qla2xxx_wake_dpc(ha);
- qla2x00_wait_for_hba_online(ha);
- scsi_unblock_requests(ha->host);
+ set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
+ qla2xxx_wake_dpc(vha);
+ qla2x00_wait_for_hba_online(vha);
+ scsi_unblock_requests(vha->host);
}
uint8_t *
-qla2x00_read_optrom_data(struct scsi_qla_host *ha, uint8_t *buf,
+qla2x00_read_optrom_data(struct scsi_qla_host *vha, uint8_t *buf,
uint32_t offset, uint32_t length)
{
uint32_t addr, midpoint;
uint8_t *data;
+ struct qla_hw_data *ha = vha->hw;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
/* Suspend HBA. */
- qla2x00_suspend_hba(ha);
+ qla2x00_suspend_hba(vha);
/* Go with read. */
midpoint = ha->optrom_size / 2;
@@ -1922,13 +1936,13 @@
qla2x00_flash_disable(ha);
/* Resume HBA. */
- qla2x00_resume_hba(ha);
+ qla2x00_resume_hba(vha);
return buf;
}
int
-qla2x00_write_optrom_data(struct scsi_qla_host *ha, uint8_t *buf,
+qla2x00_write_optrom_data(struct scsi_qla_host *vha, uint8_t *buf,
uint32_t offset, uint32_t length)
{
@@ -1936,10 +1950,11 @@
uint8_t man_id, flash_id, sec_number, data;
uint16_t wd;
uint32_t addr, liter, sec_mask, rest_addr;
+ struct qla_hw_data *ha = vha->hw;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
/* Suspend HBA. */
- qla2x00_suspend_hba(ha);
+ qla2x00_suspend_hba(vha);
rval = QLA_SUCCESS;
sec_number = 0;
@@ -2139,55 +2154,58 @@
qla2x00_flash_disable(ha);
/* Resume HBA. */
- qla2x00_resume_hba(ha);
+ qla2x00_resume_hba(vha);
return rval;
}
uint8_t *
-qla24xx_read_optrom_data(struct scsi_qla_host *ha, uint8_t *buf,
+qla24xx_read_optrom_data(struct scsi_qla_host *vha, uint8_t *buf,
uint32_t offset, uint32_t length)
{
+ struct qla_hw_data *ha = vha->hw;
+
/* Suspend HBA. */
- scsi_block_requests(ha->host);
+ scsi_block_requests(vha->host);
set_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags);
/* Go with read. */
- qla24xx_read_flash_data(ha, (uint32_t *)buf, offset >> 2, length >> 2);
+ qla24xx_read_flash_data(vha, (uint32_t *)buf, offset >> 2, length >> 2);
/* Resume HBA. */
clear_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags);
- scsi_unblock_requests(ha->host);
+ scsi_unblock_requests(vha->host);
return buf;
}
int
-qla24xx_write_optrom_data(struct scsi_qla_host *ha, uint8_t *buf,
+qla24xx_write_optrom_data(struct scsi_qla_host *vha, uint8_t *buf,
uint32_t offset, uint32_t length)
{
int rval;
+ struct qla_hw_data *ha = vha->hw;
/* Suspend HBA. */
- scsi_block_requests(ha->host);
+ scsi_block_requests(vha->host);
set_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags);
/* Go with write. */
- rval = qla24xx_write_flash_data(ha, (uint32_t *)buf, offset >> 2,
+ rval = qla24xx_write_flash_data(vha, (uint32_t *)buf, offset >> 2,
length >> 2);
/* Resume HBA -- RISC reset needed. */
clear_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags);
- set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
- qla2xxx_wake_dpc(ha);
- qla2x00_wait_for_hba_online(ha);
- scsi_unblock_requests(ha->host);
+ set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
+ qla2xxx_wake_dpc(vha);
+ qla2x00_wait_for_hba_online(vha);
+ scsi_unblock_requests(vha->host);
return rval;
}
uint8_t *
-qla25xx_read_optrom_data(struct scsi_qla_host *ha, uint8_t *buf,
+qla25xx_read_optrom_data(struct scsi_qla_host *vha, uint8_t *buf,
uint32_t offset, uint32_t length)
{
int rval;
@@ -2195,6 +2213,7 @@
void *optrom;
uint8_t *pbuf;
uint32_t faddr, left, burst;
+ struct qla_hw_data *ha = vha->hw;
if (offset & 0xfff)
goto slow_read;
@@ -2219,7 +2238,7 @@
if (burst > left)
burst = left;
- rval = qla2x00_dump_ram(ha, optrom_dma,
+ rval = qla2x00_dump_ram(vha, optrom_dma,
flash_data_to_access_addr(faddr), burst);
if (rval) {
qla_printk(KERN_WARNING, ha,
@@ -2248,7 +2267,7 @@
return buf;
slow_read:
- return qla24xx_read_optrom_data(ha, buf, offset, length);
+ return qla24xx_read_optrom_data(vha, buf, offset, length);
}
/**
@@ -2270,7 +2289,7 @@
* Returns QLA_SUCCESS on successful retrieval of version.
*/
static void
-qla2x00_get_fcode_version(scsi_qla_host_t *ha, uint32_t pcids)
+qla2x00_get_fcode_version(struct qla_hw_data *ha, uint32_t pcids)
{
int ret = QLA_FUNCTION_FAILED;
uint32_t istart, iend, iter, vend;
@@ -2344,13 +2363,14 @@
}
int
-qla2x00_get_flash_version(scsi_qla_host_t *ha, void *mbuf)
+qla2x00_get_flash_version(scsi_qla_host_t *vha, void *mbuf)
{
int ret = QLA_SUCCESS;
uint8_t code_type, last_image;
uint32_t pcihdr, pcids;
uint8_t *dbyte;
uint16_t *dcode;
+ struct qla_hw_data *ha = vha->hw;
if (!ha->pio_address || !mbuf)
return QLA_FUNCTION_FAILED;
@@ -2370,8 +2390,8 @@
if (qla2x00_read_flash_byte(ha, pcihdr) != 0x55 ||
qla2x00_read_flash_byte(ha, pcihdr + 0x01) != 0xaa) {
/* No signature */
- DEBUG2(printk("scsi(%ld): No matching ROM "
- "signature.\n", ha->host_no));
+ DEBUG2(qla_printk(KERN_DEBUG, ha, "No matching ROM "
+ "signature.\n"));
ret = QLA_FUNCTION_FAILED;
break;
}
@@ -2387,8 +2407,8 @@
qla2x00_read_flash_byte(ha, pcids + 0x2) != 'I' ||
qla2x00_read_flash_byte(ha, pcids + 0x3) != 'R') {
/* Incorrect header. */
- DEBUG2(printk("%s(): PCI data struct not found "
- "pcir_adr=%x.\n", __func__, pcids));
+ DEBUG2(qla_printk(KERN_INFO, ha, "PCI data struct not "
+ "found pcir_adr=%x.\n", pcids));
ret = QLA_FUNCTION_FAILED;
break;
}
@@ -2402,7 +2422,7 @@
qla2x00_read_flash_byte(ha, pcids + 0x12);
ha->bios_revision[1] =
qla2x00_read_flash_byte(ha, pcids + 0x13);
- DEBUG3(printk("%s(): read BIOS %d.%d.\n", __func__,
+ DEBUG3(qla_printk(KERN_DEBUG, ha, "read BIOS %d.%d.\n",
ha->bios_revision[1], ha->bios_revision[0]));
break;
case ROM_CODE_TYPE_FCODE:
@@ -2416,12 +2436,12 @@
qla2x00_read_flash_byte(ha, pcids + 0x12);
ha->efi_revision[1] =
qla2x00_read_flash_byte(ha, pcids + 0x13);
- DEBUG3(printk("%s(): read EFI %d.%d.\n", __func__,
+ DEBUG3(qla_printk(KERN_DEBUG, ha, "read EFI %d.%d.\n",
ha->efi_revision[1], ha->efi_revision[0]));
break;
default:
- DEBUG2(printk("%s(): Unrecognized code type %x at "
- "pcids %x.\n", __func__, code_type, pcids));
+ DEBUG2(qla_printk(KERN_INFO, ha, "Unrecognized code "
+ "type %x at pcids %x.\n", code_type, pcids));
break;
}
@@ -2441,16 +2461,16 @@
qla2x00_read_flash_data(ha, dbyte, ha->flt_region_fw * 4 + 10,
8);
- DEBUG3(printk("%s(%ld): dumping fw ver from flash:\n",
- __func__, ha->host_no));
+ DEBUG3(qla_printk(KERN_DEBUG, ha, "dumping fw ver from "
+ "flash:\n"));
DEBUG3(qla2x00_dump_buffer((uint8_t *)dbyte, 8));
if ((dcode[0] == 0xffff && dcode[1] == 0xffff &&
dcode[2] == 0xffff && dcode[3] == 0xffff) ||
(dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
dcode[3] == 0)) {
- DEBUG2(printk("%s(): Unrecognized fw revision at "
- "%x.\n", __func__, ha->flt_region_fw * 4));
+ DEBUG2(qla_printk(KERN_INFO, ha, "Unrecognized fw "
+ "revision at %x.\n", ha->flt_region_fw * 4));
} else {
/* values are in big endian */
ha->fw_revision[0] = dbyte[0] << 16 | dbyte[1];
@@ -2465,7 +2485,7 @@
}
int
-qla24xx_get_flash_version(scsi_qla_host_t *ha, void *mbuf)
+qla24xx_get_flash_version(scsi_qla_host_t *vha, void *mbuf)
{
int ret = QLA_SUCCESS;
uint32_t pcihdr, pcids;
@@ -2473,6 +2493,7 @@
uint8_t *bcode;
uint8_t code_type, last_image;
int i;
+ struct qla_hw_data *ha = vha->hw;
if (!mbuf)
return QLA_FUNCTION_FAILED;
@@ -2489,12 +2510,12 @@
last_image = 1;
do {
/* Verify PCI expansion ROM header. */
- qla24xx_read_flash_data(ha, dcode, pcihdr >> 2, 0x20);
+ qla24xx_read_flash_data(vha, dcode, pcihdr >> 2, 0x20);
bcode = mbuf + (pcihdr % 4);
if (bcode[0x0] != 0x55 || bcode[0x1] != 0xaa) {
/* No signature */
- DEBUG2(printk("scsi(%ld): No matching ROM "
- "signature.\n", ha->host_no));
+ DEBUG2(qla_printk(KERN_DEBUG, ha, "No matching ROM "
+ "signature.\n"));
ret = QLA_FUNCTION_FAILED;
break;
}
@@ -2502,15 +2523,15 @@
/* Locate PCI data structure. */
pcids = pcihdr + ((bcode[0x19] << 8) | bcode[0x18]);
- qla24xx_read_flash_data(ha, dcode, pcids >> 2, 0x20);
+ qla24xx_read_flash_data(vha, dcode, pcids >> 2, 0x20);
bcode = mbuf + (pcihdr % 4);
/* Validate signature of PCI data structure. */
if (bcode[0x0] != 'P' || bcode[0x1] != 'C' ||
bcode[0x2] != 'I' || bcode[0x3] != 'R') {
/* Incorrect header. */
- DEBUG2(printk("%s(): PCI data struct not found "
- "pcir_adr=%x.\n", __func__, pcids));
+ DEBUG2(qla_printk(KERN_INFO, ha, "PCI data struct not "
+ "found pcir_adr=%x.\n", pcids));
ret = QLA_FUNCTION_FAILED;
break;
}
@@ -2522,26 +2543,26 @@
/* Intel x86, PC-AT compatible. */
ha->bios_revision[0] = bcode[0x12];
ha->bios_revision[1] = bcode[0x13];
- DEBUG3(printk("%s(): read BIOS %d.%d.\n", __func__,
+ DEBUG3(qla_printk(KERN_DEBUG, ha, "read BIOS %d.%d.\n",
ha->bios_revision[1], ha->bios_revision[0]));
break;
case ROM_CODE_TYPE_FCODE:
/* Open Firmware standard for PCI (FCode). */
ha->fcode_revision[0] = bcode[0x12];
ha->fcode_revision[1] = bcode[0x13];
- DEBUG3(printk("%s(): read FCODE %d.%d.\n", __func__,
+ DEBUG3(qla_printk(KERN_DEBUG, ha, "read FCODE %d.%d.\n",
ha->fcode_revision[1], ha->fcode_revision[0]));
break;
case ROM_CODE_TYPE_EFI:
/* Extensible Firmware Interface (EFI). */
ha->efi_revision[0] = bcode[0x12];
ha->efi_revision[1] = bcode[0x13];
- DEBUG3(printk("%s(): read EFI %d.%d.\n", __func__,
+ DEBUG3(qla_printk(KERN_DEBUG, ha, "read EFI %d.%d.\n",
ha->efi_revision[1], ha->efi_revision[0]));
break;
default:
- DEBUG2(printk("%s(): Unrecognized code type %x at "
- "pcids %x.\n", __func__, code_type, pcids));
+ DEBUG2(qla_printk(KERN_INFO, ha, "Unrecognized code "
+ "type %x at pcids %x.\n", code_type, pcids));
break;
}
@@ -2555,7 +2576,7 @@
memset(ha->fw_revision, 0, sizeof(ha->fw_revision));
dcode = mbuf;
- qla24xx_read_flash_data(ha, dcode, ha->flt_region_fw + 4, 4);
+ qla24xx_read_flash_data(vha, dcode, ha->flt_region_fw + 4, 4);
for (i = 0; i < 4; i++)
dcode[i] = be32_to_cpu(dcode[i]);
@@ -2563,8 +2584,8 @@
dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
(dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
dcode[3] == 0)) {
- DEBUG2(printk("%s(): Unrecognized fw version at %x.\n",
- __func__, ha->flt_region_fw));
+ DEBUG2(qla_printk(KERN_INFO, ha, "Unrecognized fw "
+ "revision at %x.\n", ha->flt_region_fw * 4));
} else {
ha->fw_revision[0] = dcode[0];
ha->fw_revision[1] = dcode[1];
@@ -2593,8 +2614,9 @@
}
int
-qla2xxx_get_vpd_field(scsi_qla_host_t *ha, char *key, char *str, size_t size)
+qla2xxx_get_vpd_field(scsi_qla_host_t *vha, char *key, char *str, size_t size)
{
+ struct qla_hw_data *ha = vha->hw;
uint8_t *pos = ha->vpd;
uint8_t *end = pos + ha->vpd_size;
int len = 0;
@@ -2621,9 +2643,10 @@
}
static int
-qla2xxx_hw_event_store(scsi_qla_host_t *ha, uint32_t *fdata)
+qla2xxx_hw_event_store(scsi_qla_host_t *vha, uint32_t *fdata)
{
uint32_t d[2], faddr;
+ struct qla_hw_data *ha = vha->hw;
/* Locate first empty entry. */
for (;;) {
@@ -2634,7 +2657,7 @@
return QLA_MEMORY_ALLOC_FAILED;
}
- qla24xx_read_flash_data(ha, d, ha->hw_event_ptr, 2);
+ qla24xx_read_flash_data(vha, d, ha->hw_event_ptr, 2);
faddr = flash_data_to_access_addr(ha->hw_event_ptr);
ha->hw_event_ptr += FA_HW_EVENT_ENTRY_SIZE;
if (d[0] == __constant_cpu_to_le32(0xffffffff) &&
@@ -2655,12 +2678,12 @@
}
int
-qla2xxx_hw_event_log(scsi_qla_host_t *ha, uint16_t code, uint16_t d1,
+qla2xxx_hw_event_log(scsi_qla_host_t *vha, uint16_t code, uint16_t d1,
uint16_t d2, uint16_t d3)
{
#define QMARK(a, b, c, d) \
cpu_to_le32(LSB(a) << 24 | LSB(b) << 16 | LSB(c) << 8 | LSB(d))
-
+ struct qla_hw_data *ha = vha->hw;
int rval;
uint32_t marker[2], fdata[4];
@@ -2681,7 +2704,7 @@
/* Locate marker. */
ha->hw_event_ptr = ha->flt_region_hw_event;
for (;;) {
- qla24xx_read_flash_data(ha, fdata, ha->hw_event_ptr,
+ qla24xx_read_flash_data(vha, fdata, ha->hw_event_ptr,
4);
if (fdata[0] == __constant_cpu_to_le32(0xffffffff) &&
fdata[1] == __constant_cpu_to_le32(0xffffffff))
@@ -2700,7 +2723,7 @@
}
/* No marker, write it. */
if (!ha->flags.hw_event_marker_found) {
- rval = qla2xxx_hw_event_store(ha, marker);
+ rval = qla2xxx_hw_event_store(vha, marker);
if (rval != QLA_SUCCESS) {
DEBUG2(qla_printk(KERN_WARNING, ha,
"HW event -- Failed marker write=%x.!\n",
@@ -2714,7 +2737,7 @@
/* Store error. */
fdata[0] = cpu_to_le32(code << 16 | d1);
fdata[1] = cpu_to_le32(d2 << 16 | d3);
- rval = qla2xxx_hw_event_store(ha, fdata);
+ rval = qla2xxx_hw_event_store(vha, fdata);
if (rval != QLA_SUCCESS) {
DEBUG2(qla_printk(KERN_WARNING, ha,
"HW event -- Failed error write=%x.!\n",