commit | c06e836ada59fbc6d1109277e693e5b3e056ac12 | [log] [tgz] |
---|---|---|
author | John Crispin <blogic@openwrt.org> | Sun Jan 20 22:00:57 2013 +0100 |
committer | John Crispin <blogic@openwrt.org> | Sun Feb 17 01:25:29 2013 +0100 |
tree | 2dba753c01872704c8dc13487cf603df7513d94d | |
parent | 19d3814e7b325f8965fd71f329b3467a97f8d217 [diff] |
MIPS: ralink: adds reset code Resetting these SoCs requires no real magic. The code is straight forward. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4891/