| /* |
| * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC |
| * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35, |
| * AT91SAM9X25, AT91SAM9X35 SoC |
| * |
| * Copyright (C) 2012 Atmel, |
| * 2012 Nicolas Ferre <nicolas.ferre@atmel.com> |
| * |
| * Licensed under GPLv2 or later. |
| */ |
| |
| /include/ "skeleton.dtsi" |
| |
| / { |
| model = "Atmel AT91SAM9x5 family SoC"; |
| compatible = "atmel,at91sam9x5"; |
| interrupt-parent = <&aic>; |
| |
| aliases { |
| serial0 = &dbgu; |
| serial1 = &usart0; |
| serial2 = &usart1; |
| serial3 = &usart2; |
| gpio0 = &pioA; |
| gpio1 = &pioB; |
| gpio2 = &pioC; |
| gpio3 = &pioD; |
| tcb0 = &tcb0; |
| tcb1 = &tcb1; |
| i2c0 = &i2c0; |
| i2c1 = &i2c1; |
| i2c2 = &i2c2; |
| }; |
| cpus { |
| cpu@0 { |
| compatible = "arm,arm926ejs"; |
| }; |
| }; |
| |
| memory { |
| reg = <0x20000000 0x10000000>; |
| }; |
| |
| ahb { |
| compatible = "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| |
| apb { |
| compatible = "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| |
| aic: interrupt-controller@fffff000 { |
| #interrupt-cells = <3>; |
| compatible = "atmel,at91rm9200-aic"; |
| interrupt-controller; |
| reg = <0xfffff000 0x200>; |
| atmel,external-irqs = <31>; |
| }; |
| |
| ramc0: ramc@ffffe800 { |
| compatible = "atmel,at91sam9g45-ddramc"; |
| reg = <0xffffe800 0x200>; |
| }; |
| |
| pmc: pmc@fffffc00 { |
| compatible = "atmel,at91rm9200-pmc"; |
| reg = <0xfffffc00 0x100>; |
| }; |
| |
| rstc@fffffe00 { |
| compatible = "atmel,at91sam9g45-rstc"; |
| reg = <0xfffffe00 0x10>; |
| }; |
| |
| shdwc@fffffe10 { |
| compatible = "atmel,at91sam9x5-shdwc"; |
| reg = <0xfffffe10 0x10>; |
| }; |
| |
| pit: timer@fffffe30 { |
| compatible = "atmel,at91sam9260-pit"; |
| reg = <0xfffffe30 0xf>; |
| interrupts = <1 4 7>; |
| }; |
| |
| tcb0: timer@f8008000 { |
| compatible = "atmel,at91sam9x5-tcb"; |
| reg = <0xf8008000 0x100>; |
| interrupts = <17 4 0>; |
| }; |
| |
| tcb1: timer@f800c000 { |
| compatible = "atmel,at91sam9x5-tcb"; |
| reg = <0xf800c000 0x100>; |
| interrupts = <17 4 0>; |
| }; |
| |
| dma0: dma-controller@ffffec00 { |
| compatible = "atmel,at91sam9g45-dma"; |
| reg = <0xffffec00 0x200>; |
| interrupts = <20 4 0>; |
| }; |
| |
| dma1: dma-controller@ffffee00 { |
| compatible = "atmel,at91sam9g45-dma"; |
| reg = <0xffffee00 0x200>; |
| interrupts = <21 4 0>; |
| }; |
| |
| pinctrl@fffff400 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus"; |
| ranges = <0xfffff400 0xfffff400 0x800>; |
| |
| /* shared pinctrl settings */ |
| dbgu { |
| pinctrl_dbgu: dbgu-0 { |
| atmel,pins = |
| <0 9 0x1 0x0 /* PA9 periph A */ |
| 0 10 0x1 0x1>; /* PA10 periph A with pullup */ |
| }; |
| }; |
| |
| uart0 { |
| pinctrl_uart0: uart0-0 { |
| atmel,pins = |
| <0 0 0x1 0x1 /* PA0 periph A with pullup */ |
| 0 1 0x1 0x0>; /* PA1 periph A */ |
| }; |
| |
| pinctrl_uart0_rts_cts: uart0_rts_cts-0 { |
| atmel,pins = |
| <0 2 0x1 0x0 /* PA2 periph A */ |
| 0 3 0x1 0x0>; /* PA3 periph A */ |
| }; |
| }; |
| |
| uart1 { |
| pinctrl_uart1: uart1-0 { |
| atmel,pins = |
| <0 5 0x1 0x1 /* PA5 periph A with pullup */ |
| 0 6 0x1 0x0>; /* PA6 periph A */ |
| }; |
| |
| pinctrl_uart1_rts_cts: uart1_rts_cts-0 { |
| atmel,pins = |
| <3 27 0x3 0x0 /* PC27 periph C */ |
| 3 28 0x3 0x0>; /* PC28 periph C */ |
| }; |
| }; |
| |
| uart2 { |
| pinctrl_uart2: uart2-0 { |
| atmel,pins = |
| <0 7 0x1 0x1 /* PA7 periph A with pullup */ |
| 0 8 0x1 0x0>; /* PA8 periph A */ |
| }; |
| |
| pinctrl_uart2_rts_cts: uart2_rts_cts-0 { |
| atmel,pins = |
| <0 0 0x2 0x0 /* PB0 periph B */ |
| 0 1 0x2 0x0>; /* PB1 periph B */ |
| }; |
| }; |
| |
| uart3 { |
| pinctrl_uart3: uart3-0 { |
| atmel,pins = |
| <3 23 0x2 0x1 /* PC22 periph B with pullup */ |
| 3 23 0x2 0x0>; /* PC23 periph B */ |
| }; |
| |
| pinctrl_uart3_rts_cts: uart3_rts_cts-0 { |
| atmel,pins = |
| <3 24 0x2 0x0 /* PC24 periph B */ |
| 3 25 0x2 0x0>; /* PC25 periph B */ |
| }; |
| }; |
| |
| usart0 { |
| pinctrl_usart0: usart0-0 { |
| atmel,pins = |
| <3 8 0x3 0x0 /* PC8 periph C */ |
| 3 9 0x3 0x1>; /* PC9 periph C with pullup */ |
| }; |
| }; |
| |
| usart1 { |
| pinctrl_usart1: usart1-0 { |
| atmel,pins = |
| <3 16 0x3 0x0 /* PC16 periph C */ |
| 3 17 0x3 0x1>; /* PC17 periph C with pullup */ |
| }; |
| }; |
| |
| nand { |
| pinctrl_nand: nand-0 { |
| atmel,pins = |
| <3 4 0x0 0x1 /* PD5 gpio RDY pin pull_up */ |
| 3 5 0x0 0x1>; /* PD4 gpio enable pin pull_up */ |
| }; |
| }; |
| |
| pioA: gpio@fffff400 { |
| compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
| reg = <0xfffff400 0x200>; |
| interrupts = <2 4 1>; |
| #gpio-cells = <2>; |
| gpio-controller; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| |
| pioB: gpio@fffff600 { |
| compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
| reg = <0xfffff600 0x200>; |
| interrupts = <2 4 1>; |
| #gpio-cells = <2>; |
| gpio-controller; |
| #gpio-lines = <19>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| |
| pioC: gpio@fffff800 { |
| compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
| reg = <0xfffff800 0x200>; |
| interrupts = <3 4 1>; |
| #gpio-cells = <2>; |
| gpio-controller; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| |
| pioD: gpio@fffffa00 { |
| compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
| reg = <0xfffffa00 0x200>; |
| interrupts = <3 4 1>; |
| #gpio-cells = <2>; |
| gpio-controller; |
| #gpio-lines = <22>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| }; |
| |
| dbgu: serial@fffff200 { |
| compatible = "atmel,at91sam9260-usart"; |
| reg = <0xfffff200 0x200>; |
| interrupts = <1 4 7>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_dbgu>; |
| status = "disabled"; |
| }; |
| |
| usart0: serial@f801c000 { |
| compatible = "atmel,at91sam9260-usart"; |
| reg = <0xf801c000 0x200>; |
| interrupts = <5 4 5>; |
| atmel,use-dma-rx; |
| atmel,use-dma-tx; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart0>; |
| status = "disabled"; |
| }; |
| |
| usart1: serial@f8020000 { |
| compatible = "atmel,at91sam9260-usart"; |
| reg = <0xf8020000 0x200>; |
| interrupts = <6 4 5>; |
| atmel,use-dma-rx; |
| atmel,use-dma-tx; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart1>; |
| status = "disabled"; |
| }; |
| |
| usart2: serial@f8024000 { |
| compatible = "atmel,at91sam9260-usart"; |
| reg = <0xf8024000 0x200>; |
| interrupts = <7 4 5>; |
| atmel,use-dma-rx; |
| atmel,use-dma-tx; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart2>; |
| status = "disabled"; |
| }; |
| |
| macb0: ethernet@f802c000 { |
| compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
| reg = <0xf802c000 0x100>; |
| interrupts = <24 4 3>; |
| status = "disabled"; |
| }; |
| |
| macb1: ethernet@f8030000 { |
| compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
| reg = <0xf8030000 0x100>; |
| interrupts = <27 4 3>; |
| status = "disabled"; |
| }; |
| |
| i2c0: i2c@f8010000 { |
| compatible = "atmel,at91sam9x5-i2c"; |
| reg = <0xf8010000 0x100>; |
| interrupts = <9 4 6>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| i2c1: i2c@f8014000 { |
| compatible = "atmel,at91sam9x5-i2c"; |
| reg = <0xf8014000 0x100>; |
| interrupts = <10 4 6>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| i2c2: i2c@f8018000 { |
| compatible = "atmel,at91sam9x5-i2c"; |
| reg = <0xf8018000 0x100>; |
| interrupts = <11 4 6>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| adc0: adc@f804c000 { |
| compatible = "atmel,at91sam9260-adc"; |
| reg = <0xf804c000 0x100>; |
| interrupts = <19 4 0>; |
| atmel,adc-use-external; |
| atmel,adc-channels-used = <0xffff>; |
| atmel,adc-vref = <3300>; |
| atmel,adc-num-channels = <12>; |
| atmel,adc-startup-time = <40>; |
| atmel,adc-channel-base = <0x50>; |
| atmel,adc-drdy-mask = <0x1000000>; |
| atmel,adc-status-register = <0x30>; |
| atmel,adc-trigger-register = <0xc0>; |
| |
| trigger@0 { |
| trigger-name = "external-rising"; |
| trigger-value = <0x1>; |
| trigger-external; |
| }; |
| |
| trigger@1 { |
| trigger-name = "external-falling"; |
| trigger-value = <0x2>; |
| trigger-external; |
| }; |
| |
| trigger@2 { |
| trigger-name = "external-any"; |
| trigger-value = <0x3>; |
| trigger-external; |
| }; |
| |
| trigger@3 { |
| trigger-name = "continuous"; |
| trigger-value = <0x6>; |
| }; |
| }; |
| }; |
| |
| nand0: nand@40000000 { |
| compatible = "atmel,at91rm9200-nand"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| reg = <0x40000000 0x10000000 |
| >; |
| atmel,nand-addr-offset = <21>; |
| atmel,nand-cmd-offset = <22>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_nand>; |
| gpios = <&pioD 5 0 |
| &pioD 4 0 |
| 0 |
| >; |
| status = "disabled"; |
| }; |
| |
| usb0: ohci@00600000 { |
| compatible = "atmel,at91rm9200-ohci", "usb-ohci"; |
| reg = <0x00600000 0x100000>; |
| interrupts = <22 4 2>; |
| status = "disabled"; |
| }; |
| |
| usb1: ehci@00700000 { |
| compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; |
| reg = <0x00700000 0x100000>; |
| interrupts = <22 4 2>; |
| status = "disabled"; |
| }; |
| }; |
| |
| i2c@0 { |
| compatible = "i2c-gpio"; |
| gpios = <&pioA 30 0 /* sda */ |
| &pioA 31 0 /* scl */ |
| >; |
| i2c-gpio,sda-open-drain; |
| i2c-gpio,scl-open-drain; |
| i2c-gpio,delay-us = <2>; /* ~100 kHz */ |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| i2c@1 { |
| compatible = "i2c-gpio"; |
| gpios = <&pioC 0 0 /* sda */ |
| &pioC 1 0 /* scl */ |
| >; |
| i2c-gpio,sda-open-drain; |
| i2c-gpio,scl-open-drain; |
| i2c-gpio,delay-us = <2>; /* ~100 kHz */ |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| i2c@2 { |
| compatible = "i2c-gpio"; |
| gpios = <&pioB 4 0 /* sda */ |
| &pioB 5 0 /* scl */ |
| >; |
| i2c-gpio,sda-open-drain; |
| i2c-gpio,scl-open-drain; |
| i2c-gpio,delay-us = <2>; /* ~100 kHz */ |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| }; |