commit | 7f1f054b3fac0b19ec0d74e3e18b73785c26f0a8 | [log] [tgz] |
---|---|---|
author | Thierry Reding <treding@nvidia.com> | Tue Aug 26 17:11:38 2014 +0200 |
committer | Bjorn Helgaas <bhelgaas@google.com> | Tue Sep 16 16:55:49 2014 -0600 |
tree | 57fe5853eaa5f0e8763635a29f3c82a1dbbb9337 | |
parent | ec73276204f06b6446a9c9b70173a1c15f6de536 [diff] |
PCI: tegra: Add Tegra124 support The PCIe controller on Tegra124 has two root ports that can be used in a x4/x1 or x2/x1 configuration and can run at PCIe 2.0 link speeds (up to 5 GT/s). The PHY programming has been moved into a separate controller, so the driver now needs to request an external PHY referenced using the device tree. Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>