| commit | 7f53fbba3cf8db8f584b26e89802413bc2e8d902 | [log] [tgz] |
|---|---|---|
| author | Heiko Stuebner <heiko@sntech.de> | Fri Jan 30 20:28:48 2015 +0100 |
| committer | Mark Yao <mark.yao@rock-chips.com> | Fri Apr 03 14:23:01 2015 +0800 |
| tree | fda31bfb904bacd7c0011fc84cfd78b70ac8d047 | |
| parent | 502e95c6678505474f1056480310cd9382bacbac [diff] |
drm/rockchip: fix clk enable disable mismatch in vop_crtc_mode_set The function disables the dclk at the beginning, so don't simply return when an error happens, but instead enable the clock again, so that enable and disable calls are balanced. ret_clk is introduced to hold the clk_enable result and not mangle the original error code. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>