| commit | 80b4ae7acea48774761a54ba8432206b20e4d8f1 | [log] [tgz] |
|---|---|---|
| author | Scott Wood <oss@buserror.net> | Mon Mar 20 10:37:23 2017 +0800 |
| committer | Stephen Boyd <sboyd@codeaurora.org> | Thu Jun 01 01:24:13 2017 -0700 |
| tree | 64cc93e2d92903d1422cc255683f00eca9549115 | |
| parent | 3d362b1fab97dffaf3f6ef55a03c7dcccfa97fd3 [diff] |
clk: qoriq: Separate root input clock for core PLLs on ls1012a ls1012a has separate input root clocks for core PLLs versus the platform PLL, with the latter described as sysclk in the hw docs. If a second input clock, named "coreclk", is present, this clock will be used for the core PLLs. Signed-off-by: Scott Wood <oss@buserror.net> Signed-off-by: Tang Yuantian <andy.tang@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>