| commit | 81e911d0dcdb35203785542e0417cd8feb45df65 | [log] [tgz] |
|---|---|---|
| author | Chen-Yu Tsai <wens@csie.org> | Mon Jul 24 21:58:58 2017 +0800 |
| committer | Ulf Hansson <ulf.hansson@linaro.org> | Wed Aug 30 14:01:48 2017 +0200 |
| tree | 0d5ada4405b192bfa9e03017306f77ee9a81eae1 | |
| parent | dc8797e39fca777217fd4cfc9c74a5337a3daa76 [diff] |
clk: sunxi-ng: a83t: Support new timing mode for mmc2 clock The MMC2 clock supports a new timing mode. When the new mode is active, the output clock rate is halved. This patch sets the feature flag for the new timing mode, and adds a pre-divider based on the mode bit. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>