tree 8e397b7a0323758483cabfffb604331b1f4469f8
parent 864499449f256e32815575a9b860267ebefa6d70
author Jacob Keller <jacob.e.keller@intel.com> 1343805145 +0000
committer Jeff Kirsher <jeffrey.t.kirsher@intel.com> 1349275666 -0700

ixgbe: Fix PTP X540 SDP alignment code for PPS signal

This patch fixes a bug in the method used for calculating the trigger
alignment for SDP0 when enabling a PPS output on the X540. The alignment math
wasn't properly taking into account the overflow cyclecounter, and was
misaligning the pin triggers so that two X540 devices synced properly had
mis-aligned SDP pins. This patch fixes the math to calculate the correct
seconds alignment for the PPS signal.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>