tree 224bfaa52a57c35bab33c055735caa6e1a8a39b9
parent 0eeb4f2af5f71f64ba6362df33ddc1f218075c52
parent 11c6fbd8d982617996fbc39097a84092eb6e8005
parent 1db823ee9f677e1a863cd04fda391a7520fcd0e8
parent 9aa52850455f7e46bb9eb72ebb9d8a571bf11cce
parent 4356e1a33b132d86e19a772ed62e77645b03f8f2
author Bjorn Helgaas <bhelgaas@google.com> 1401806742 -0600
committer Bjorn Helgaas <bhelgaas@google.com> 1401806742 -0600

Merge branches 'pci/host-designware', 'pci/host-imx6', 'pci/host-mvebu' and 'pci/host-tegra' into next

* pci/host-designware:
  PCI: designware: Remove unnecessary use of 'conf_lock' spinlock
  PCI: designware: Use new OF interrupt mapping when possible
  PCI: designware: Fix iATU programming for cfg1, io and mem viewport
  PCI: designware: Fix comment for setting number of lanes

* pci/host-imx6:
  PCI: designware: Split Exynos and i.MX bindings

* pci/host-mvebu:
  PCI: mvebu: Use '%pa' for printing 'phys_addr_t' type
  PCI: mvebu: Remove unnecessary use of 'conf_lock' spinlock
  PCI: mvebu: split PCIe BARs into multiple MBus windows when needed
  bus: mvebu-mbus: allow several windows with the same target/attribute
  bus: mvebu-mbus: Avoid setting an undefined window size
  PCI: mvebu: fix off-by-one in the computed size of the mbus windows

* pci/host-tegra:
  PCI: tegra: Use new OF interrupt mapping when possible