| commit | 85fa532b6ef920b32598df86b194571a7059a77c | [log] [tgz] |
|---|---|---|
| author | Mike Dyer <mike.dyer@md-soft.co.uk> | Fri Aug 16 18:36:28 2013 +0100 |
| committer | Mark Brown <broonie@linaro.org> | Sun Aug 18 16:30:26 2013 +0100 |
| tree | a8e6b1f126b056005af744fc5d408458ed472f62 | |
| parent | d4e4ab86bcba5a72779c43dc1459f71fea3d89c8 [diff] |
ASoC: wm8960: Fix PLL register writes Bit 9 of PLL2,3 and 4 is reserved as '0'. The 24bit fractional part should be split across each register in 8bit chunks. Signed-off-by: Mike Dyer <mike.dyer@md-soft.co.uk> Signed-off-by: Mark Brown <broonie@linaro.org> Cc: stable@vger.kernel.org