| commit | 86027ae78c9294bb450b76eec28cfb431a8fb3ee | [log] [tgz] |
|---|---|---|
| author | Jonas Andersson <jonas@microbit.se> | Wed Mar 04 08:24:26 2009 +0100 |
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | Wed Mar 04 14:47:39 2009 +0000 |
| tree | 4e2634b23e5f050f0065ad4ff2a6845409f1e532 | |
| parent | ec67624d33d5639bcc6ee6918cb1fc0bd1bac3a8 [diff] |
ASoC: wm8510 pll settings When setting WM8510_MCLKDIV the pll was turned off. When setting pll frequency you got twice the expected freq, because the code calculated with postscaler of 8, but the hardware divide by 4. Signed-off-by: Jonas Andersson <jonas@microbit.se> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>