| commit | 88ddc1f8e3674f0b71016f5461868f14a02281a2 | [log] [tgz] |
|---|---|---|
| author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | Sat Oct 22 14:29:05 2016 +0300 |
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | Wed Nov 02 20:40:07 2016 +0100 |
| tree | b3bcbab855361fea160ceffdfe503f531fef103e | |
| parent | f4407a6e26b1abf9a1e168fa893783f999112df2 [diff] |
clk: renesas: r8a7796: Add VSP clocks Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>