| commit | 8d31528703ceda6f631e39953130abe9b3ca52b2 | [log] [tgz] |
|---|---|---|
| author | Jesse Barnes <jbarnes@virtuousgeek.org> | Sun Oct 16 10:23:31 2011 +0200 |
| committer | Keith Packard <keithp@keithp.com> | Thu Oct 20 15:26:41 2011 -0700 |
| tree | f64ff55c111adb9e479cad97ceede6174b824aa6 | |
| parent | 9d971b37534fb268251f74cc04a36a0a16f7da04 [diff] |
drm/i915: Use PIPE_CONTROL for flushing on gen6+. v2 by danvet: Use a new flag to flush the render target cache on gen6+ (hw reuses the old write flush bit), as suggested by Ben Widawsdy. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> [danvet: this seems to fix cairo-perf-trace hangs on my snb] Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Keith Packard <keithp@keithp.com>