[media] em28xx: extend GPIO register definitions for the em25xx, em276x/7x/8x, em2874/174/84
The em25xx/em276x/7x/8x provides 4 GPIO register sets,
each of them consisting of separate read and a write registers.
The same registers are also used by the em2874/174/84.
Signed-off-by: Frank Schäfer <fschaefer.oss@googlemail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
diff --git a/drivers/media/usb/em28xx/em28xx-cards.c b/drivers/media/usb/em28xx/em28xx-cards.c
index e4b0669..c0b8535 100644
--- a/drivers/media/usb/em28xx/em28xx-cards.c
+++ b/drivers/media/usb/em28xx/em28xx-cards.c
@@ -285,14 +285,14 @@
/* Reset for the most [digital] boards */
static struct em28xx_reg_seq leadership_digital[] = {
- {EM2874_R80_GPIO, 0x70, 0xff, 10},
+ {EM2874_R80_GPIO_P0_CTRL, 0x70, 0xff, 10},
{ -1, -1, -1, -1},
};
static struct em28xx_reg_seq leadership_reset[] = {
- {EM2874_R80_GPIO, 0xf0, 0xff, 10},
- {EM2874_R80_GPIO, 0xb0, 0xff, 10},
- {EM2874_R80_GPIO, 0xf0, 0xff, 10},
+ {EM2874_R80_GPIO_P0_CTRL, 0xf0, 0xff, 10},
+ {EM2874_R80_GPIO_P0_CTRL, 0xb0, 0xff, 10},
+ {EM2874_R80_GPIO_P0_CTRL, 0xf0, 0xff, 10},
{ -1, -1, -1, -1},
};
@@ -301,25 +301,25 @@
* GPIO_7 - LED
*/
static struct em28xx_reg_seq pctv_290e[] = {
- {EM2874_R80_GPIO, 0x00, 0xff, 80},
- {EM2874_R80_GPIO, 0x40, 0xff, 80}, /* GPIO_6 = 1 */
- {EM2874_R80_GPIO, 0xc0, 0xff, 80}, /* GPIO_7 = 1 */
+ {EM2874_R80_GPIO_P0_CTRL, 0x00, 0xff, 80},
+ {EM2874_R80_GPIO_P0_CTRL, 0x40, 0xff, 80}, /* GPIO_6 = 1 */
+ {EM2874_R80_GPIO_P0_CTRL, 0xc0, 0xff, 80}, /* GPIO_7 = 1 */
{-1, -1, -1, -1},
};
#if 0
static struct em28xx_reg_seq terratec_h5_gpio[] = {
{EM28XX_R08_GPIO, 0xff, 0xff, 10},
- {EM2874_R80_GPIO, 0xf6, 0xff, 100},
- {EM2874_R80_GPIO, 0xf2, 0xff, 50},
- {EM2874_R80_GPIO, 0xf6, 0xff, 50},
+ {EM2874_R80_GPIO_P0_CTRL, 0xf6, 0xff, 100},
+ {EM2874_R80_GPIO_P0_CTRL, 0xf2, 0xff, 50},
+ {EM2874_R80_GPIO_P0_CTRL, 0xf6, 0xff, 50},
{ -1, -1, -1, -1},
};
static struct em28xx_reg_seq terratec_h5_digital[] = {
- {EM2874_R80_GPIO, 0xf6, 0xff, 10},
- {EM2874_R80_GPIO, 0xe6, 0xff, 100},
- {EM2874_R80_GPIO, 0xa6, 0xff, 10},
+ {EM2874_R80_GPIO_P0_CTRL, 0xf6, 0xff, 10},
+ {EM2874_R80_GPIO_P0_CTRL, 0xe6, 0xff, 100},
+ {EM2874_R80_GPIO_P0_CTRL, 0xa6, 0xff, 10},
{ -1, -1, -1, -1},
};
#endif
@@ -335,39 +335,39 @@
* GPIO_7 - LED (green LED)
*/
static struct em28xx_reg_seq pctv_460e[] = {
- {EM2874_R80_GPIO, 0x01, 0xff, 50},
+ {EM2874_R80_GPIO_P0_CTRL, 0x01, 0xff, 50},
{0x0d, 0xff, 0xff, 50},
- {EM2874_R80_GPIO, 0x41, 0xff, 50}, /* GPIO_6=1 */
+ {EM2874_R80_GPIO_P0_CTRL, 0x41, 0xff, 50}, /* GPIO_6=1 */
{0x0d, 0x42, 0xff, 50},
- {EM2874_R80_GPIO, 0x61, 0xff, 50}, /* GPIO_5=1 */
+ {EM2874_R80_GPIO_P0_CTRL, 0x61, 0xff, 50}, /* GPIO_5=1 */
{ -1, -1, -1, -1},
};
static struct em28xx_reg_seq c3tech_digital_duo_digital[] = {
- {EM2874_R80_GPIO, 0xff, 0xff, 10},
- {EM2874_R80_GPIO, 0xfd, 0xff, 10}, /* xc5000 reset */
- {EM2874_R80_GPIO, 0xf9, 0xff, 35},
- {EM2874_R80_GPIO, 0xfd, 0xff, 10},
- {EM2874_R80_GPIO, 0xff, 0xff, 10},
- {EM2874_R80_GPIO, 0xfe, 0xff, 10},
- {EM2874_R80_GPIO, 0xbe, 0xff, 10},
- {EM2874_R80_GPIO, 0xfe, 0xff, 20},
+ {EM2874_R80_GPIO_P0_CTRL, 0xff, 0xff, 10},
+ {EM2874_R80_GPIO_P0_CTRL, 0xfd, 0xff, 10}, /* xc5000 reset */
+ {EM2874_R80_GPIO_P0_CTRL, 0xf9, 0xff, 35},
+ {EM2874_R80_GPIO_P0_CTRL, 0xfd, 0xff, 10},
+ {EM2874_R80_GPIO_P0_CTRL, 0xff, 0xff, 10},
+ {EM2874_R80_GPIO_P0_CTRL, 0xfe, 0xff, 10},
+ {EM2874_R80_GPIO_P0_CTRL, 0xbe, 0xff, 10},
+ {EM2874_R80_GPIO_P0_CTRL, 0xfe, 0xff, 20},
{ -1, -1, -1, -1},
};
#if 0
static struct em28xx_reg_seq hauppauge_930c_gpio[] = {
- {EM2874_R80_GPIO, 0x6f, 0xff, 10},
- {EM2874_R80_GPIO, 0x4f, 0xff, 10}, /* xc5000 reset */
- {EM2874_R80_GPIO, 0x6f, 0xff, 10},
- {EM2874_R80_GPIO, 0x4f, 0xff, 10},
+ {EM2874_R80_GPIO_P0_CTRL, 0x6f, 0xff, 10},
+ {EM2874_R80_GPIO_P0_CTRL, 0x4f, 0xff, 10}, /* xc5000 reset */
+ {EM2874_R80_GPIO_P0_CTRL, 0x6f, 0xff, 10},
+ {EM2874_R80_GPIO_P0_CTRL, 0x4f, 0xff, 10},
{ -1, -1, -1, -1},
};
static struct em28xx_reg_seq hauppauge_930c_digital[] = {
- {EM2874_R80_GPIO, 0xf6, 0xff, 10},
- {EM2874_R80_GPIO, 0xe6, 0xff, 100},
- {EM2874_R80_GPIO, 0xa6, 0xff, 10},
+ {EM2874_R80_GPIO_P0_CTRL, 0xf6, 0xff, 10},
+ {EM2874_R80_GPIO_P0_CTRL, 0xe6, 0xff, 100},
+ {EM2874_R80_GPIO_P0_CTRL, 0xa6, 0xff, 10},
{ -1, -1, -1, -1},
};
#endif
@@ -378,9 +378,9 @@
* GPIO_7 - LED, 0=active
*/
static struct em28xx_reg_seq maxmedia_ub425_tc[] = {
- {EM2874_R80_GPIO, 0x83, 0xff, 100},
- {EM2874_R80_GPIO, 0xc3, 0xff, 100}, /* GPIO_6 = 1 */
- {EM2874_R80_GPIO, 0x43, 0xff, 000}, /* GPIO_7 = 0 */
+ {EM2874_R80_GPIO_P0_CTRL, 0x83, 0xff, 100},
+ {EM2874_R80_GPIO_P0_CTRL, 0xc3, 0xff, 100}, /* GPIO_6 = 1 */
+ {EM2874_R80_GPIO_P0_CTRL, 0x43, 0xff, 000}, /* GPIO_7 = 0 */
{-1, -1, -1, -1},
};
@@ -391,9 +391,9 @@
* GPIO_7: LED, 1=active
*/
static struct em28xx_reg_seq pctv_510e[] = {
- {EM2874_R80_GPIO, 0x10, 0xff, 100},
- {EM2874_R80_GPIO, 0x14, 0xff, 100}, /* GPIO_2 = 1 */
- {EM2874_R80_GPIO, 0x54, 0xff, 050}, /* GPIO_6 = 1 */
+ {EM2874_R80_GPIO_P0_CTRL, 0x10, 0xff, 100},
+ {EM2874_R80_GPIO_P0_CTRL, 0x14, 0xff, 100}, /* GPIO_2 = 1 */
+ {EM2874_R80_GPIO_P0_CTRL, 0x54, 0xff, 050}, /* GPIO_6 = 1 */
{ -1, -1, -1, -1},
};
@@ -404,10 +404,10 @@
* GPIO_7: LED, 1=active
*/
static struct em28xx_reg_seq pctv_520e[] = {
- {EM2874_R80_GPIO, 0x10, 0xff, 100},
- {EM2874_R80_GPIO, 0x14, 0xff, 100}, /* GPIO_2 = 1 */
- {EM2874_R80_GPIO, 0x54, 0xff, 050}, /* GPIO_6 = 1 */
- {EM2874_R80_GPIO, 0xd4, 0xff, 000}, /* GPIO_7 = 1 */
+ {EM2874_R80_GPIO_P0_CTRL, 0x10, 0xff, 100},
+ {EM2874_R80_GPIO_P0_CTRL, 0x14, 0xff, 100}, /* GPIO_2 = 1 */
+ {EM2874_R80_GPIO_P0_CTRL, 0x54, 0xff, 050}, /* GPIO_6 = 1 */
+ {EM2874_R80_GPIO_P0_CTRL, 0xd4, 0xff, 000}, /* GPIO_7 = 1 */
{ -1, -1, -1, -1},
};
@@ -2947,13 +2947,13 @@
break;
case CHIP_ID_EM2874:
chip_name = "em2874";
- dev->reg_gpio_num = EM2874_R80_GPIO;
+ dev->reg_gpio_num = EM2874_R80_GPIO_P0_CTRL;
dev->wait_after_write = 0;
dev->eeprom_addrwidth_16bit = 1;
break;
case CHIP_ID_EM28174:
chip_name = "em28174";
- dev->reg_gpio_num = EM2874_R80_GPIO;
+ dev->reg_gpio_num = EM2874_R80_GPIO_P0_CTRL;
dev->wait_after_write = 0;
dev->eeprom_addrwidth_16bit = 1;
break;
@@ -2963,7 +2963,7 @@
break;
case CHIP_ID_EM2884:
chip_name = "em2884";
- dev->reg_gpio_num = EM2874_R80_GPIO;
+ dev->reg_gpio_num = EM2874_R80_GPIO_P0_CTRL;
dev->wait_after_write = 0;
dev->eeprom_addrwidth_16bit = 1;
break;
diff --git a/drivers/media/usb/em28xx/em28xx-dvb.c b/drivers/media/usb/em28xx/em28xx-dvb.c
index 42ede68..69aed82 100644
--- a/drivers/media/usb/em28xx/em28xx-dvb.c
+++ b/drivers/media/usb/em28xx/em28xx-dvb.c
@@ -421,23 +421,23 @@
int i;
struct em28xx_reg_seq hauppauge_hvr930c_init[] = {
- {EM2874_R80_GPIO, 0xff, 0xff, 0x65},
- {EM2874_R80_GPIO, 0xfb, 0xff, 0x32},
- {EM2874_R80_GPIO, 0xff, 0xff, 0xb8},
+ {EM2874_R80_GPIO_P0_CTRL, 0xff, 0xff, 0x65},
+ {EM2874_R80_GPIO_P0_CTRL, 0xfb, 0xff, 0x32},
+ {EM2874_R80_GPIO_P0_CTRL, 0xff, 0xff, 0xb8},
{ -1, -1, -1, -1},
};
struct em28xx_reg_seq hauppauge_hvr930c_end[] = {
- {EM2874_R80_GPIO, 0xef, 0xff, 0x01},
- {EM2874_R80_GPIO, 0xaf, 0xff, 0x65},
- {EM2874_R80_GPIO, 0xef, 0xff, 0x76},
- {EM2874_R80_GPIO, 0xef, 0xff, 0x01},
- {EM2874_R80_GPIO, 0xcf, 0xff, 0x0b},
- {EM2874_R80_GPIO, 0xef, 0xff, 0x40},
+ {EM2874_R80_GPIO_P0_CTRL, 0xef, 0xff, 0x01},
+ {EM2874_R80_GPIO_P0_CTRL, 0xaf, 0xff, 0x65},
+ {EM2874_R80_GPIO_P0_CTRL, 0xef, 0xff, 0x76},
+ {EM2874_R80_GPIO_P0_CTRL, 0xef, 0xff, 0x01},
+ {EM2874_R80_GPIO_P0_CTRL, 0xcf, 0xff, 0x0b},
+ {EM2874_R80_GPIO_P0_CTRL, 0xef, 0xff, 0x40},
- {EM2874_R80_GPIO, 0xcf, 0xff, 0x65},
- {EM2874_R80_GPIO, 0xef, 0xff, 0x65},
- {EM2874_R80_GPIO, 0xcf, 0xff, 0x0b},
- {EM2874_R80_GPIO, 0xef, 0xff, 0x65},
+ {EM2874_R80_GPIO_P0_CTRL, 0xcf, 0xff, 0x65},
+ {EM2874_R80_GPIO_P0_CTRL, 0xef, 0xff, 0x65},
+ {EM2874_R80_GPIO_P0_CTRL, 0xcf, 0xff, 0x0b},
+ {EM2874_R80_GPIO_P0_CTRL, 0xef, 0xff, 0x65},
{ -1, -1, -1, -1},
};
@@ -488,15 +488,15 @@
int i;
struct em28xx_reg_seq terratec_h5_init[] = {
{EM28XX_R08_GPIO, 0xff, 0xff, 10},
- {EM2874_R80_GPIO, 0xf6, 0xff, 100},
- {EM2874_R80_GPIO, 0xf2, 0xff, 50},
- {EM2874_R80_GPIO, 0xf6, 0xff, 100},
+ {EM2874_R80_GPIO_P0_CTRL, 0xf6, 0xff, 100},
+ {EM2874_R80_GPIO_P0_CTRL, 0xf2, 0xff, 50},
+ {EM2874_R80_GPIO_P0_CTRL, 0xf6, 0xff, 100},
{ -1, -1, -1, -1},
};
struct em28xx_reg_seq terratec_h5_end[] = {
- {EM2874_R80_GPIO, 0xe6, 0xff, 100},
- {EM2874_R80_GPIO, 0xa6, 0xff, 50},
- {EM2874_R80_GPIO, 0xe6, 0xff, 100},
+ {EM2874_R80_GPIO_P0_CTRL, 0xe6, 0xff, 100},
+ {EM2874_R80_GPIO_P0_CTRL, 0xa6, 0xff, 50},
+ {EM2874_R80_GPIO_P0_CTRL, 0xe6, 0xff, 100},
{ -1, -1, -1, -1},
};
struct {
@@ -544,14 +544,14 @@
*/
struct em28xx_reg_seq terratec_htc_stick_init[] = {
{EM28XX_R08_GPIO, 0xff, 0xff, 10},
- {EM2874_R80_GPIO, 0xf6, 0xff, 100},
- {EM2874_R80_GPIO, 0xe6, 0xff, 50},
- {EM2874_R80_GPIO, 0xf6, 0xff, 100},
+ {EM2874_R80_GPIO_P0_CTRL, 0xf6, 0xff, 100},
+ {EM2874_R80_GPIO_P0_CTRL, 0xe6, 0xff, 50},
+ {EM2874_R80_GPIO_P0_CTRL, 0xf6, 0xff, 100},
{ -1, -1, -1, -1},
};
struct em28xx_reg_seq terratec_htc_stick_end[] = {
- {EM2874_R80_GPIO, 0xb6, 0xff, 100},
- {EM2874_R80_GPIO, 0xf6, 0xff, 50},
+ {EM2874_R80_GPIO_P0_CTRL, 0xb6, 0xff, 100},
+ {EM2874_R80_GPIO_P0_CTRL, 0xf6, 0xff, 50},
{ -1, -1, -1, -1},
};
@@ -591,15 +591,15 @@
struct em28xx_reg_seq terratec_htc_usb_xs_init[] = {
{EM28XX_R08_GPIO, 0xff, 0xff, 10},
- {EM2874_R80_GPIO, 0xb2, 0xff, 100},
- {EM2874_R80_GPIO, 0xb2, 0xff, 50},
- {EM2874_R80_GPIO, 0xb6, 0xff, 100},
+ {EM2874_R80_GPIO_P0_CTRL, 0xb2, 0xff, 100},
+ {EM2874_R80_GPIO_P0_CTRL, 0xb2, 0xff, 50},
+ {EM2874_R80_GPIO_P0_CTRL, 0xb6, 0xff, 100},
{ -1, -1, -1, -1},
};
struct em28xx_reg_seq terratec_htc_usb_xs_end[] = {
- {EM2874_R80_GPIO, 0xa6, 0xff, 100},
- {EM2874_R80_GPIO, 0xa6, 0xff, 50},
- {EM2874_R80_GPIO, 0xe6, 0xff, 100},
+ {EM2874_R80_GPIO_P0_CTRL, 0xa6, 0xff, 100},
+ {EM2874_R80_GPIO_P0_CTRL, 0xa6, 0xff, 50},
+ {EM2874_R80_GPIO_P0_CTRL, 0xe6, 0xff, 100},
{ -1, -1, -1, -1},
};
diff --git a/drivers/media/usb/em28xx/em28xx-reg.h b/drivers/media/usb/em28xx/em28xx-reg.h
index 622871d..0233c5b 100644
--- a/drivers/media/usb/em28xx/em28xx-reg.h
+++ b/drivers/media/usb/em28xx/em28xx-reg.h
@@ -193,7 +193,20 @@
#define EM2874_R50_IR_CONFIG 0x50
#define EM2874_R51_IR 0x51
#define EM2874_R5F_TS_ENABLE 0x5f
-#define EM2874_R80_GPIO 0x80
+
+/* em2874/174/84, em25xx, em276x/7x/8x GPIO registers */
+/*
+ * NOTE: not all ports are bonded out;
+ * Some ports are multiplexed with special function I/O
+ */
+#define EM2874_R80_GPIO_P0_CTRL 0x80
+#define EM2874_R81_GPIO_P1_CTRL 0x81
+#define EM2874_R82_GPIO_P2_CTRL 0x82
+#define EM2874_R83_GPIO_P3_CTRL 0x83
+#define EM2874_R84_GPIO_P0_STATE 0x84
+#define EM2874_R85_GPIO_P1_STATE 0x85
+#define EM2874_R86_GPIO_P2_STATE 0x86
+#define EM2874_R87_GPIO_P3_STATE 0x87
/* em2874 IR config register (0x50) */
#define EM2874_IR_NEC 0x00