commit | 91b74e9761d785f41156383ad5ec7c437dfb2960 | [log] [tgz] |
---|---|---|
author | Aravind Ganesan <aravindg@codeaurora.org> | Mon Sep 08 10:57:28 2014 -0600 |
committer | Rob Clark <robdclark@gmail.com> | Sun Nov 16 14:27:39 2014 -0500 |
tree | bb344f63d25279f548137ba634a3afe621fbc854 | |
parent | 257d06f7043a432774a315223053730f8b170b0e [diff] |
drm/msm: Handle register offset differences between a3xx and a4xx Register offsets have changed between a3xx and a4xx GPUs. To be able access these registers in common code, we create a lookup table, and set of read-write APIs to access the register through the lookup table. Signed-off-by: Aravind Ganesan <aravindg@codeaurora.org> [robclark: remove REG_ADRENO_UNDEFINED, just use zero, and minor tweaks for latest generated headers] Signed-off-by: Rob Clark <robdclark@gmail.com>