| commit | 9217c1abbc145a77d65c476cf2004a3df02104c7 | [log] [tgz] |
|---|---|---|
| author | Andrey Gusakov <andrey.gusakov@cogentembedded.com> | Tue Nov 07 19:56:23 2017 +0300 |
| committer | Andrzej Hajda <a.hajda@samsung.com> | Thu Nov 30 07:56:12 2017 +0100 |
| tree | 7e37fe8bdb1e03c578327927874f269f0f3eb85e | |
| parent | 66d1c3b94d5d59e4325e61a78d520f92c043d645 [diff] |
drm/bridge: tc358767: fix AUXDATAn registers access First four bytes should go to DP0_AUXWDATA0. Due to bug if len > 4 first four bytes was writen to DP0_AUXWDATA1 and all data get shifted by 4 bytes. Fix it. Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Link: https://patchwork.freedesktop.org/patch/msgid/1510073785-16108-6-git-send-email-andrey.gusakov@cogentembedded.com