tree 94f192d9534985030b65c03a96c781efbb5c243b
parent 36c0d0cf33ed31fada15caac34d50555b33208bb
author Alex Dai <yu.dai@intel.com> 1443206816 -0700
committer Daniel Vetter <daniel.vetter@ffwll.ch> 1443626112 +0200

drm/i915/guc: Media domain bit needed when notify GuC rc6 state

GuC expects two bits for Render and Media domain separately when
driver sends data via host2guc SAMPLE_FORCEWAKE. Bit 0 is for
Render and bit 1 is for Media domain.

v2: Keep sync with code for WaRsDoubleRc6WrlWithCoarsePowerGating

v1: Add parameters definition to avoid magic value

Signed-off-by: Alex Dai <yu.dai@intel.com>
Reviewed-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>