| commit | 9495f2648287029fb5545c34a0fa318426ebe84c | [log] [tgz] |
|---|---|---|
| author | Kedareswara rao Appana <appana.durga.rao@xilinx.com> | Fri Feb 26 19:33:54 2016 +0530 |
| committer | Vinod Koul <vinod.koul@intel.com> | Thu Mar 03 21:02:38 2016 +0530 |
| tree | d48c73bf9f81d4d30df51d6f21d599af88f9cc7e | |
| parent | 26c5e36931b3fea7461ba6f0d8b65eb25ce2b917 [diff] |
dmaengine: xilinx_vdma: Use readl_poll_timeout instead of do while loop's It is sometimes necessary to poll a memory-mapped register until its value satisfies some condition use convenience macros that do this instead of do while loop's. This patch updates the same in the driver. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>