| /* |
| * Samsung's Exynos4212 SoC device tree source |
| * |
| * Copyright (c) 2012 Samsung Electronics Co., Ltd. |
| * http://www.samsung.com |
| * |
| * Samsung's Exynos4212 SoC device nodes are listed in this file. Exynos4212 |
| * based board files can include this file and provide values for board specfic |
| * bindings. |
| * |
| * Note: This file does not include device nodes for all the controllers in |
| * Exynos4212 SoC. As device tree coverage for Exynos4212 increases, additional |
| * nodes can be added to this file. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| |
| #include "exynos4x12.dtsi" |
| |
| / { |
| compatible = "samsung,exynos4212", "samsung,exynos4"; |
| |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cpu0: cpu@A00 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a9"; |
| reg = <0xA00>; |
| cooling-min-level = <13>; |
| cooling-max-level = <7>; |
| #cooling-cells = <2>; /* min followed by max */ |
| }; |
| |
| cpu@A01 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a9"; |
| reg = <0xA01>; |
| }; |
| }; |
| |
| combiner: interrupt-controller@10440000 { |
| samsung,combiner-nr = <18>; |
| }; |
| |
| gic: interrupt-controller@10490000 { |
| cpu-offset = <0x8000>; |
| }; |
| }; |