commit 98ce472181e760a552314850c238b14bbf3f04ec
author Ralf Baechle <ralf@linux-mips.org> Tue Oct 30 15:43:44 2007 +0000
committer Ralf Baechle <ralf@linux-mips.org> Mon Nov 26 17:26:13 2007 +0000
tree e2868580151a44e5853f1383b728984a6984ccf0
parent 526a6770692477ff258621b1b8838cce9304f8e4

[MIPS] IP32: More interrupt renumbering fixes.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

arch/mips/sgi-ip32/ip32-irq.c

diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c
index aab17dd..cab7cc2 100644
--- a/arch/mips/sgi-ip32/ip32-irq.c
+++ b/arch/mips/sgi-ip32/ip32-irq.c
@@ -209,18 +209,18 @@
 
 static void enable_macepci_irq(unsigned int irq)
 {
-	macepci_mask |= MACEPCI_CONTROL_INT(irq - 9);
+	macepci_mask |= MACEPCI_CONTROL_INT(irq - MACEPCI_SCSI0_IRQ);
 	mace->pci.control = macepci_mask;
-	crime_mask |= 1 << (irq - 1);
+	crime_mask |= 1 << (irq - CRIME_IRQ_BASE);
 	crime->imask = crime_mask;
 }
 
 static void disable_macepci_irq(unsigned int irq)
 {
-	crime_mask &= ~(1 << (irq - 1));
+	crime_mask &= ~(1 << (irq - CRIME_IRQ_BASE));
 	crime->imask = crime_mask;
 	flush_crime_bus();
-	macepci_mask &= ~MACEPCI_CONTROL_INT(irq - 9);
+	macepci_mask &= ~MACEPCI_CONTROL_INT(irq - MACEPCI_SCSI0_IRQ);
 	mace->pci.control = macepci_mask;
 	flush_mace_bus();
 }
@@ -299,7 +299,7 @@
 	pr_debug("crime_int %08x enabled\n", crime_int);
 	crime_mask |= crime_int;
 	crime->imask = crime_mask;
-	maceisa_mask |= 1 << (irq - 33);
+	maceisa_mask |= 1 << (irq - MACEISA_AUDIO_SW_IRQ);
 	mace->perif.ctrl.imask = maceisa_mask;
 }
 
@@ -307,7 +307,7 @@
 {
 	unsigned int crime_int = 0;
 
-	maceisa_mask &= ~(1 << (irq - 33));
+	maceisa_mask &= ~(1 << (irq - MACEISA_AUDIO_SW_IRQ));
         if (!(maceisa_mask & MACEISA_AUDIO_INT))
 		crime_int |= MACE_AUDIO_INT;
         if (!(maceisa_mask & MACEISA_MISC_INT))
@@ -331,7 +331,7 @@
 	case MACEISA_SERIAL2_TDMAPR_IRQ:
 		/* edge triggered */
 		mace_int = mace->perif.ctrl.istat;
-		mace_int &= ~(1 << (irq - 33));
+		mace_int &= ~(1 << (irq - MACEISA_AUDIO_SW_IRQ));
 		mace->perif.ctrl.istat = mace_int;
 		break;
 	}
@@ -359,13 +359,17 @@
 
 static void enable_mace_irq(unsigned int irq)
 {
-	crime_mask |= 1 << (irq - 1);
+	unsigned int bit = irq - CRIME_IRQ_BASE;
+
+	crime_mask |= (1 << bit);
 	crime->imask = crime_mask;
 }
 
 static void disable_mace_irq(unsigned int irq)
 {
-	crime_mask &= ~(1 << (irq - 1));
+	unsigned int bit = irq - CRIME_IRQ_BASE;
+
+	crime_mask &= ~(1 << bit);
 	crime->imask = crime_mask;
 	flush_crime_bus();
 }
@@ -489,7 +493,7 @@
 	mace->perif.ctrl.imask = 0;
 
 	mips_cpu_irq_init();
-	for (irq = MIPS_CPU_IRQ_BASE + 8; irq <= IP32_IRQ_MAX; irq++) {
+	for (irq = CRIME_IRQ_BASE; irq <= IP32_IRQ_MAX; irq++) {
 		switch (irq) {
 		case MACE_VID_IN1_IRQ ... MACE_PCI_BRIDGE_IRQ:
 			set_irq_chip(irq, &ip32_mace_interrupt);

include/asm-mips/ip32/ip32_ints.h

diff --git a/include/asm-mips/ip32/ip32_ints.h b/include/asm-mips/ip32/ip32_ints.h
index ab5612f..85bc530 100644
--- a/include/asm-mips/ip32/ip32_ints.h
+++ b/include/asm-mips/ip32/ip32_ints.h
@@ -22,7 +22,7 @@
 	 * CPU interrupts are 0 ... 7
 	 */
 
-	CRIME_IRQ_BASE			= MIPS_CPU_IRQ_BASE,
+	CRIME_IRQ_BASE			= MIPS_CPU_IRQ_BASE + 8,
 
 	/*
 	 * MACE