| commit | 9a5e6c7eb5ccbb5f0d3a1dffce135f0a727f40e1 | [log] [tgz] |
|---|---|---|
| author | Chen-Yu Tsai <wens@csie.org> | Thu Jun 26 23:55:41 2014 +0800 |
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | Fri Jul 04 12:05:12 2014 +0200 |
| tree | 283615dde84a477cae1909b831be8778867ad342 | |
| parent | 70eab199fa39cb78e13d369db55f24a3839b8f9e [diff] |
clk: sunxi: Support factor clocks with N factor starting not from 0 The PLLs on newer Allwinner SoC's, such as the A31 and A23, have a N multiplier factor that starts from 1, not 0. This patch adds an option to the factor clk driver's config data structures to specify the base value of N. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>