tree e8ff2bf11abff7782a32c3ac75d6148bd63aca7b
parent c3a7d4ade5a5ac5bec63382bda35a92629447efb
author Vivien Didelot <vivien.didelot@savoirfairelinux.com> 1489266772 -0500
committer David S. Miller <davem@davemloft.net> 1489388045 -0700

net: dsa: mv88e6xxx: rework ATU Load/Purge

All Marvell switch chips have an ATU accessed using the same Global (1)
register layout. Only the handling of the FID differs as more bits were
necessary to support more and more databases.

Add and use a fresh documented implementation of the ATU Load/Purge.

The static mv88e6xxx_g1_atu_{fid_write,op_wait,op,data_write,mac_write}
functions won't need to be exposed in the end so for the moment keep
their counterparts _mv88e6xxx_atu_{wait,cmd,data_write,mac_write} as is,
since they are still used by other ATU operations.

Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>