| commit | 9c7d5768681193b3bb9f00409d689141d20d5bff | [log] [tgz] |
|---|---|---|
| author | Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> | Fri Nov 14 11:25:30 2014 +0000 |
| committer | Markos Chandras <markos.chandras@imgtec.com> | Tue Feb 17 15:37:27 2015 +0000 |
| tree | 630149aaf406e52be62713b0839ead9ad1391aac | |
| parent | 515a6393dbac4f4492237c7b305bbf9c4c558a1c [diff] |
MIPS: kernel: traps: Add MIPS R6 related definitions Add MIPS R6 support to cache and ftlb exceptions, as well as to the hwrena and ebase register configuration. Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>