| commit | 9cbb035cc111f5c6655f1026d4e7918282f6e137 | [log] [tgz] |
|---|---|---|
| author | Bin Meng <bmeng.cn@gmail.com> | Mon Sep 11 02:41:51 2017 -0700 |
| committer | Cyrille Pitchen <cyrille.pitchen@wedev4u.fr> | Wed Oct 11 09:40:06 2017 +0200 |
| tree | 9f25b6b08e07576d07043be7ec832bfeb6809b9a | |
| parent | 824af37ef2d054d1f89bd2b9125755a4acc37332 [diff] |
spi-nor: intel-spi: Fix number of protected range registers for BYT/LPT The number of protected range registers is not the same on BYT/LPT/ BXT. GPR0 only exists on Apollo Lake and its offset is reserved on other platforms. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>