| commit | a3c4946db4fe64cb21b66a09e89890678aac6d65 | [log] [tgz] |
|---|---|---|
| author | Ralf Baechle <ralf@linux-mips.org> | Mon Mar 13 16:16:29 2006 +0000 |
| committer | Ralf Baechle <ralf@linux-mips.org> | Sat Mar 18 16:59:26 2006 +0000 |
| tree | 3b63d5e765af3eedbc1cda84135f1b702a43a6f2 | |
| parent | 3a2f735700332621274aca752be3b6f839fa47e7 [diff] |
[MIPS] SB1: Fix interrupt disable hazard.
The SB1 core has a three cycle interrupt disable hazard but we were
wrongly treating it as fully interlocked.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>