| commit | a4f4fa681add289ebfec6d776376ad7a2ffda669 | [log] [tgz] |
|---|---|---|
| author | Jean-Philippe Brucker <jean-philippe.brucker@arm.com> | Tue May 30 09:25:48 2017 -0700 |
| committer | Bjorn Helgaas <bhelgaas@google.com> | Tue May 30 15:39:15 2017 -0500 |
| tree | bad540deacc055ab92790af76e4e20f9107729a0 | |
| parent | 2ea659a9ef488125eb46da6eb571de5eae5c43f6 [diff] |
PCI: Cache PRI and PASID bits in pci_dev Device drivers need to check if an IOMMU enabled ATS, PRI and PASID in order to know when they can use the SVM API. Cache PRI and PASID bits in the pci_dev structure, similarly to what is currently done for ATS. Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>