V4L/DVB (12222): gspca - stv06xx-hdcs: Fix sensor sequence bug
All hdcs registers use bit 0 as a read/write flag and needs to be shifted one bit to the left. This wasn't accounted for when doing a sequence of writes.
Signed-off-by: Erik Andrén <erik.andren@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
diff --git a/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.c b/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.c
index ec7f553..a45171b 100644
--- a/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.c
+++ b/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.c
@@ -131,9 +131,11 @@
(reg + len > 0xff)))
return -EINVAL;
- for (i = 0; i < len; i++, reg++) {
- regs[2*i] = reg;
- regs[2*i+1] = vals[i];
+ for (i = 0; i < len; i++) {
+ regs[2 * i] = reg;
+ regs[2 * i + 1] = vals[i];
+ /* All addresses are shifted left one bit as bit 0 toggles r/w */
+ reg += 2;
}
return stv06xx_write_sensor_bytes(sd, regs, len);