ASoC: Davinci: Fix FS polarity for I2S format
Commit 75d9ac4 ("ASoC: Allow DAI formats to be specified in the dai_link")
changed DAI format flag values and we cannot simply invert anymore e.g.
frame-sync with ^= SND_SOC_DAIFMT_NB_IF (which was anyway misuse) as there
is no anymore fixed bit position for bit-clock or frame-sync inversion.
Fix this by relying only on DAI format flag values passed to us and by not
making any assumption on individual bit positions
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Cc: Vaibhav Bedia <vaibhav.bedia@ti.com>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
diff --git a/sound/soc/davinci/davinci-i2s.c b/sound/soc/davinci/davinci-i2s.c
index d0d60b8..300e121 100644
--- a/sound/soc/davinci/davinci-i2s.c
+++ b/sound/soc/davinci/davinci-i2s.c
@@ -265,6 +265,7 @@
struct davinci_mcbsp_dev *dev = snd_soc_dai_get_drvdata(cpu_dai);
unsigned int pcr;
unsigned int srgr;
+ bool inv_fs = false;
/* Attention srgr is updated by hw_params! */
srgr = DAVINCI_MCBSP_SRGR_FSGM |
DAVINCI_MCBSP_SRGR_FPER(DEFAULT_BITPERSAMPLE * 2 - 1) |
@@ -330,7 +331,7 @@
* more empty bit clock slots between channels as the sample
* rate is lowered.
*/
- fmt ^= SND_SOC_DAIFMT_NB_IF;
+ inv_fs = true;
case SND_SOC_DAIFMT_DSP_A:
dev->mode = MOD_DSP_A;
break;
@@ -394,6 +395,8 @@
default:
return -EINVAL;
}
+ if (inv_fs == true)
+ pcr ^= (DAVINCI_MCBSP_PCR_FSXP | DAVINCI_MCBSP_PCR_FSRP);
davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SRGR_REG, srgr);
dev->pcr = pcr;
davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_PCR_REG, pcr);