tree 45ff6362d087c18bf61d95d03a8618fcd04be261
parent 87f8020ec9e3069597746040a4e8655189bc0c1a
author Damien Lespiau <damien.lespiau@intel.com> 1349437866 +0100
committer Daniel Vetter <daniel.vetter@ffwll.ch> 1349641646 +0200

drm/i915: Remove the disabling of VHR unit clock gating for HSW

There's is another register (a read only, so no harm done) at 0x42020 on
Haswell GPUs. Let's just remove the write from the copy&paste that
introduced haswell_init_clock_gating().

A note for the interested reader, it does seem we have a duplication of
the 0x42020 register definition, hence the removal of 2 writes. That
duplication could be the object of a later patch.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>