| commit | b74ea102b746a1e5157d6b0c83f486ad3c6235d1 | [log] [tgz] |
|---|---|---|
| author | Rodrigo Vivi <rodrigo.vivi@gmail.com> | Thu May 09 14:08:38 2013 -0300 |
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | Fri May 10 21:56:48 2013 +0200 |
| tree | 56c2ee79b4ca2c2f1b92e3db9857931168e34c88 | |
| parent | 30ca7c6f97e266d122b03261f75f530d5c83608b [diff] |
drm/i915: IVB FBC WaFbcDisableDpfcClockGating Display register 42020h bit 9 must be set to 1b for the entire time that Frame Buffer Compression is enabled. v2: RMW to preserve other bits (by Ville) v3: Fix from Ville: sed &/| at RMW v4: Too far on sed. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>