| |
| /* |
| * Copyright 2013 Freescale Semiconductor, Inc. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| * |
| */ |
| |
| #include <dt-bindings/interrupt-controller/irq.h> |
| #include "imx6dl-pinfunc.h" |
| #include "imx6qdl.dtsi" |
| |
| / { |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cpu@0 { |
| compatible = "arm,cortex-a9"; |
| device_type = "cpu"; |
| reg = <0>; |
| next-level-cache = <&L2>; |
| operating-points = < |
| /* kHz uV */ |
| 996000 1275000 |
| 792000 1175000 |
| 396000 1075000 |
| >; |
| fsl,soc-operating-points = < |
| /* ARM kHz SOC-PU uV */ |
| 996000 1175000 |
| 792000 1175000 |
| 396000 1175000 |
| >; |
| clock-latency = <61036>; /* two CLK32 periods */ |
| clocks = <&clks 104>, <&clks 6>, <&clks 16>, |
| <&clks 17>, <&clks 170>; |
| clock-names = "arm", "pll2_pfd2_396m", "step", |
| "pll1_sw", "pll1_sys"; |
| arm-supply = <®_arm>; |
| pu-supply = <®_pu>; |
| soc-supply = <®_soc>; |
| }; |
| |
| cpu@1 { |
| compatible = "arm,cortex-a9"; |
| device_type = "cpu"; |
| reg = <1>; |
| next-level-cache = <&L2>; |
| }; |
| }; |
| |
| soc { |
| ocram: sram@00900000 { |
| compatible = "mmio-sram"; |
| reg = <0x00900000 0x20000>; |
| clocks = <&clks 142>; |
| }; |
| |
| aips1: aips-bus@02000000 { |
| iomuxc: iomuxc@020e0000 { |
| compatible = "fsl,imx6dl-iomuxc"; |
| }; |
| |
| pxp: pxp@020f0000 { |
| reg = <0x020f0000 0x4000>; |
| interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>; |
| }; |
| |
| epdc: epdc@020f4000 { |
| reg = <0x020f4000 0x4000>; |
| interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>; |
| }; |
| |
| lcdif: lcdif@020f8000 { |
| reg = <0x020f8000 0x4000>; |
| interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>; |
| }; |
| }; |
| |
| aips2: aips-bus@02100000 { |
| i2c4: i2c@021f8000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; |
| reg = <0x021f8000 0x4000>; |
| interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&clks 116>; |
| status = "disabled"; |
| }; |
| }; |
| }; |
| |
| display-subsystem { |
| compatible = "fsl,imx-display-subsystem"; |
| ports = <&ipu1_di0>, <&ipu1_di1>; |
| }; |
| }; |
| |
| &hdmi { |
| compatible = "fsl,imx6dl-hdmi"; |
| }; |
| |
| &ldb { |
| clocks = <&clks 33>, <&clks 34>, |
| <&clks 39>, <&clks 40>, |
| <&clks 135>, <&clks 136>; |
| clock-names = "di0_pll", "di1_pll", |
| "di0_sel", "di1_sel", |
| "di0", "di1"; |
| }; |