| commit | bbeeda27abc516af51ddd93c555b6324559dbb3b | [log] [tgz] |
|---|---|---|
| author | Ido Schimmel <idosch@mellanox.com> | Wed Jan 27 15:20:26 2016 +0100 |
| committer | David S. Miller <davem@davemloft.net> | Thu Jan 28 15:55:32 2016 -0800 |
| tree | 17f141658ffb17429f377deb95f0d4767eded954 | |
| parent | 3f47f867814cdb08cd43d4b82f95bfde4a9ae579 [diff] |
mlxsw: reg: Use correct offset in field definiton
The rx_lane, tx_lane and module fields in the PMLP register don't have
an additional offset besides the base one (0x04), so set it to 0x00.
Fixes: 4ec14b7634b2 ("mlxsw: Add interface to access registers and process events")
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>