| commit | bf161d2163f7b8bf4823829dbc1a14111760187e | [log] [tgz] |
|---|---|---|
| author | Peter De Schrijver <pdeschrijver@nvidia.com> | Fri Feb 08 14:44:09 2013 +0200 |
| committer | Stephen Warren <swarren@nvidia.com> | Mon Mar 11 14:29:22 2013 -0600 |
| tree | 43c9ca8c12d394078de47d3d9576782535f4713d | |
| parent | 02e75d648899df96b79a4f98380679f48b91e3d4 [diff] |
clk: tegra: No 7.1 super clk dividers on Tegra20 Unlike Tegra30, Tegra20 does not have a 7.1 divider for the CPU superclk. Remove the clocks related to the divider. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>