tree 7caa39c8f428e6da950f893afd4de625a5604062
parent 878f8baa02d4948637c1e0b41a6055b22eb1f4a5
author Geert Uytterhoeven <geert+renesas@glider.be> 1474468301 +0200
committer Geert Uytterhoeven <geert+renesas@glider.be> 1476712581 +0200

clk: renesas: cpg-mssr: Always use readl()/writel()

The Renesas CPG/MSSR driver core uses a mix of clk_readl()/clk_writel()
and readl()/writel() to access the clock registers. Settle on the
generic readl()/writel().

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>