tree 20b83aa711c77ed54f083df423a4d639684ef319
parent 1cca3bb68af2b603371ae6ca5a9625cd75bfcb0a
author Rama Aparna Mallavarapu <aparnam@codeaurora.org> 1547694020 -0800
committer Rama Aparna Mallavarapu <aparnam@codeaurora.org> 1547764606 -0800

PM / devfreq: Introduce a memory-latency governor

Use performance counters to detect the memory latency sensitivity
of CPU workloads and vote for higher DDR frequency if required.

Change-Id: Ie77a3523bc5713fc0315bd0abc3913f485a96e0e
Signed-off-by: Rohit Gupta <rohgup@codeaurora.org>
Signed-off-by: Rama Aparna Mallavarapu <aparnam@codeaurora.org>