tree f56c5b4928f84e47a308a8d4adf664d0d34e4839
parent 0d61f0b3e222b588480e2ad1e85bb2ea57561c4b
author Scott Wood <scottwood@freescale.com> 1437247498 -0500
committer Scott Wood <scottwood@freescale.com> 1439006401 -0500

powerpc/fsl: Force coherent memory on e500mc derivatives

In CoreNet systems it is not allowed to mix M and non-M mappings to the
same memory, and coherent DMA accesses are considered to be M mappings
for this purpose.  Ignoring this has been observed to cause hard
lockups in non-SMP kernels on e6500.

Furthermore, e6500 implements the LRAT (logical to real address table)
which allows KVM guests to control the WIMGE bits.  This means that
KVM cannot force the M bit on the way it usually does, so the guest had
better set it itself.

Signed-off-by: Scott Wood <scottwood@freescale.com>