tree 76ba22226b25c46ed01016f33ce72b793d7ec3cf
parent 8564328d85f69121744d8337124857a2e726239b
author Luis R. Rodriguez <lrodriguez@atheros.com> 1255934014 -0400
committer John W. Linville <linville@tuxdriver.com> 1256935836 -0400

ath9k_hw: change the way we initialize the pll for ar9271

We adjust the core clock for ar9271 to 117 MHz; this also
requires us to adjust the baud divider based on the targetted
baud rate.

Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>